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There are 14269 results for: content related to: Mixed-Signal Circuit Design

  1. Mixed-Signal Technologies and Integrated Circuits

    Guide to State-of-the-Art Electron Devices

    Bin Zhao, James A. Hutchby, Pages: 157–170, 2013

    Published Online : 25 FEB 2013, DOI: 10.1002/9781118517543.ch12

  2. Analog and Mixed-Signal Circuit Design for Yield and Manufacturability

    Nano-CMOS Design for Manufacturabililty: Robust Circuit and Physical Design for Sub-65 nm Technology Nodes

    Ban Wong, Franz Zach, Victor Moroz, Anurag Mittal, Greg Starr, Andrew Kahng, Pages: 256–280, 2008

    Published Online : 7 FEB 2008, DOI: 10.1002/9780470382820.ch5

  3. Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola–Jones early vision tasks

    International Journal of Circuit Theory and Applications

    Volume 43, Issue 8, August 2015, Pages: 1063–1079, Jorge Fernández-Berni, Ricardo Carmona-Galán, Rocío del Río and Angel Rodríguez-Vázquez

    Article first published online : 16 APR 2014, DOI: 10.1002/cta.1996

  4. A uniform approach to mixed-signal circuit test

    International Journal of Circuit Theory and Applications

    Volume 25, Issue 2, March/April 1997, Pages: 81–93, FENG LIN, ZHENG HUI LIN and T. WILLIAM LIN

    Article first published online : 31 DEC 1998, DOI: 10.1002/(SICI)1097-007X(199703/04)25:2<81::AID-CTA952>3.0.CO;2-P

  5. Mixed-Signal Ultra-wideband Communications Receivers

    Ultra-Wideband Wireless Communications and Networks

    Sebastian Hoyos, Brian M. Sadler, Pages: 103–126, 2006

    Published Online : 31 MAY 2006, DOI: 10.1002/0470028521.ch6

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    Technology for III-N heterogeneous mixed-signal electronics

    physica status solidi (a)

    Volume 211, Issue 4, April 2014, Pages: 769–774, Kevin J. Chen, Alex Man Ho Kwan and Qimeng Jiang

    Article first published online : 25 FEB 2014, DOI: 10.1002/pssa.201300543

  7. Circuit-Level Design, Implementation, and Verification

    CMOS Sigma-Delta Converters: Practical Design Guide

    José M. de la Rosa, Rocío del Río, Pages: 186–272, 2013

    Published Online : 22 MAR 2013, DOI: 10.1002/9781118569238.ch4

  8. Synthesis of multiport resistors with piecewise-linear characteristics: a mixed-signal architecture

    International Journal of Circuit Theory and Applications

    Volume 33, Issue 4, July/August 2005, Pages: 307–319, Mauro Parodi, Marco Storace and Pedro Julián

    Article first published online : 8 JUL 2005, DOI: 10.1002/cta.322

  9. CMOS Latchup – Circuits


    Steven H. Voldman, Pages: 357–405, 2008

    Published Online : 19 JUN 2008, DOI: 10.1002/9780470516171.ch7

  10. Measurement of substrate noise in CMOS integrated circuits by using chopper-type voltage comparators

    Electronics and Communications in Japan (Part II: Electronics)

    Volume 81, Issue 5, May 1998, Pages: 59–66, Keiko Makie-Fukuda, Takanobu Anbo and Toshiro Tsukada

    Article first published online : 7 DEC 1998, DOI: 10.1002/(SICI)1520-6432(199805)81:5<59::AID-ECJB8>3.0.CO;2-#

  11. CMOS Latchup


    Steven H. Voldman, Pages: 1–54, 2008

    Published Online : 19 JUN 2008, DOI: 10.1002/9780470516171.ch1

  12. Production Test Considerations for Mixed-signal IC with Background Calibration

    IEEJ Transactions on Electrical and Electronic Engineering

    Volume 5, Issue 6, November 2010, Pages: 627–631, Takuya Yagi, Haruo Kobayashi, Yohei Tan, Satoshi Ito, Satoshi Uemori, Nobukazu Takai and Takahiro J. Yamaguchi

    Article first published online : 13 OCT 2010, DOI: 10.1002/tee.20584

  13. Extending Design-for-Test Into the Analog and Mixed-Signal Domains

    AT&T Technical Journal

    Volume 73, Issue 2, March-April 1994, Pages: 49–55, Philip V. Lopresti

    Article first published online : 29 JUL 2013, DOI: 10.1002/j.1538-7305.1994.tb00578.x

  14. Concurrent analogue fault simulation, the equation formulation aspect

    International Journal of Circuit Theory and Applications

    Volume 32, Issue 6, November/December 2004, Pages: 487–507, Vančo B. Litovski, Ivan V. Litovski and Mark Zwoliński

    Article first published online : 12 NOV 2004, DOI: 10.1002/cta.292

  15. Self-Aligned Wafer-Level Integration Technology with an embedded faraday cage for substrate crosstalk suppression

    Microwave and Optical Technology Letters

    Volume 50, Issue 3, March 2008, Pages: 829–832, H. Sharifi and S. Mohammadi

    Article first published online : 23 JAN 2008, DOI: 10.1002/mop.23207

  16. A behavioural modelling technique for visual microprocessor mixed-signal VLSI chips

    International Journal of Circuit Theory and Applications

    Volume 30, Issue 2-3, March - June 2002, Pages: 139–163, P. Földesy and A. Rodríguez-Vázquez

    Article first published online : 21 MAR 2002, DOI: 10.1002/cta.193


    Ecological Applications

    Volume 15, Issue 2, April 2005, Pages: 440–457, Paul F. Hessburg, Ellen E. Kuhlmann and Thomas W. Swetnam

    Article first published online : 1 APR 2005, DOI: 10.1890/03-5296

  18. MOS Performance versus Drain Current, Inversion Coefficient, and Channel Length

    Tradeoffs and Optimization in Analog CMOS Design

    David M. Binkley, Pages: 33–294, 2008

    Published Online : 18 JUL 2008, DOI: 10.1002/9780470033715.ch3

  19. The promising role of porous Si in mixed-signal integrated circuit technology

    physica status solidi (a)

    Volume 197, Issue 1, May 2003, Pages: 269–274, Han-Su Kim, Kyuchul Chong and Ya-Hong Xie

    Article first published online : 30 APR 2003, DOI: 10.1002/pssa.200306514

  20. Mixed-Signal PCB Layout

    Electromagnetic Compatibility Engineering

    Henry W. Ott, Pages: 660–687, 2009

    Published Online : 26 AUG 2009, DOI: 10.1002/9780470508510.ch17