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There are 12631 results for: content related to: FPGA implementation of AES algorithm for high throughput using folded parallel architecture

  1. An efficient single unit T-box/T−1-box implementation for 128-bit AES on FPGA

    Security and Communication Networks

    Volume 8, Issue 9, June 2015, Pages: 1725–1731, Dur-e-Shahwar Kundi, Arshad Aziz and Majida Kazmi

    Version of Record online : 19 DEC 2014, DOI: 10.1002/sec.1138

  2. Architecture design of high-efficient and non-memory AES crypto-core for WPAN

    Concurrency and Computation: Practice and Experience

    Volume 23, Issue 12, 25 August 2011, Pages: 1332–1347, Rong-Jian Chen, Jun-Jian Lin, Su-Min Hung, Jui-Lin Lai and Shi-Jinn Horng

    Version of Record online : 24 JUN 2010, DOI: 10.1002/cpe.1619

  3. Ultra simple way to encrypt non-volatile main memory

    Security and Communication Networks

    Volume 8, Issue 7, 10 May 2015, Pages: 1155–1168, Fangyong Hou and Hongjun He

    Version of Record online : 4 AUG 2014, DOI: 10.1002/sec.1071

  4. A low-cost UHF RFID tag chip with AES cryptography engine

    Security and Communication Networks

    Volume 7, Issue 2, February 2014, Pages: 365–375, Lingzhi Fu, Xiang Shen, Linghao Zhu and Junyu Wang

    Version of Record online : 9 MAY 2013, DOI: 10.1002/sec.723

  5. Tweakable parallel OFB mode of operation with delayed thread synchronization

    Security and Communication Networks

    Volume 9, Issue 10, 10 July 2016, Pages: 1119–1131, Boris Damjanović and Dejan Simić

    Version of Record online : 27 DEC 2015, DOI: 10.1002/sec.1404

  6. A survey of lightweight stream ciphers for embedded systems

    Security and Communication Networks

    Volume 9, Issue 10, 10 July 2016, Pages: 1226–1246, Charalampos Manifavas, George Hatzivasilis, Konstantinos Fysarakis and Yannis Papaefstathiou

    Version of Record online : 21 DEC 2015, DOI: 10.1002/sec.1399

  7. Modified data encryption standard encryption algorithm with improved error performance and enhanced security in wireless fading channels

    Security and Communication Networks

    Volume 8, Issue 4, 10 March 2015, Pages: 565–573, Walid Y. Zibideh and Mustafa M. Matalgah

    Version of Record online : 5 MAY 2014, DOI: 10.1002/sec.1003

  8. Efficient paillier cryptoprocessor for privacy-preserving data mining

    Security and Communication Networks

    Volume 9, Issue 11, 25 July 2016, Pages: 1535–1546, Ismail San, Nuray At, Ibrahim Yakut and Huseyin Polat

    Version of Record online : 21 FEB 2016, DOI: 10.1002/sec.1442

  9. A secure white-box SM4 implementation

    Security and Communication Networks

    Volume 9, Issue 10, 10 July 2016, Pages: 996–1006, Kunpeng Bai and Chuankun Wu

    Version of Record online : 16 DEC 2015, DOI: 10.1002/sec.1394

  10. Modeling and optimization of the lightweight HIGHT block cipher design with FPGA implementation

    Security and Communication Networks

    Volume 9, Issue 13, 10 September 2016, Pages: 2200–2216, Bassam Jamil Mohd, Thaier Hayajneh, Zaid Abu Khalaf and Khalil Mustafa Ahmad Yousef

    Version of Record online : 14 MAR 2016, DOI: 10.1002/sec.1479

  11. Crucial pitfall of DPA Contest V4.2 implementation

    Security and Communication Networks

    Volume 9, Issue 18, December 2016, Pages: 6094–6110, Zdenek Martinasek, Felix Iglesias, Lukas Malina and Josef Martinasek

    Version of Record online : 24 JAN 2017, DOI: 10.1002/sec.1760

  12. Screening the covert key using honey encryption to rule out the brute force attack of AES—a survey

    Security and Communication Networks

    Volume 9, Issue 18, December 2016, Pages: 6379–6385, P Dharshini, J Arokia Renjith and P Mohan Kumar

    Version of Record online : 3 FEB 2017, DOI: 10.1002/sec.1753

  13. Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview

    International Journal of Circuit Theory and Applications

    Volume 45, Issue 2, February 2017, Pages: 145–169, Antonio J. Acosta, Tommaso Addabbo and Erica Tena-Sánchez

    Version of Record online : 13 DEC 2016, DOI: 10.1002/cta.2296

  14. Advanced Encryption Standard-XTS implementation in field programmable gate array hardware

    Security and Communication Networks

    Volume 8, Issue 3, February 2015, Pages: 516–522, Shakil Ahmed, Khairulmizam Samsudin, Abdul Rahman Ramli and Fakhrul Zaman Rokhani

    Version of Record online : 3 APR 2014, DOI: 10.1002/sec.999

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    High-Speed Hardware Architectures for ARIA with Composite Field Arithmetic and Area-Throughput Trade-Offs

    ETRI Journal

    Volume 30, Issue 5, October 2008, Pages: 707–717, Sang-Woo Lee, Sang-Jae Moon and Jeong-Nyeo Kim

    Version of Record online : 1 OCT 2008, DOI: 10.4218/etrij.08.0108.0194

  16. Design and implementation of a versatile cryptographic unit for RISC processors

    Security and Communication Networks

    Volume 7, Issue 1, January 2014, Pages: 36–52, Kazim Yumbul, Erkay Savaş, Övünç Kocabaş and Johann Großschädl

    Version of Record online : 10 MAY 2012, DOI: 10.1002/sec.555

  17. Energy efficiency of encryption schemes applied to wireless sensor networks

    Security and Communication Networks

    Volume 5, Issue 7, July 2012, Pages: 789–808, Xueying Zhang, Howard M. Heys and Cheng Li

    Version of Record online : 21 SEP 2011, DOI: 10.1002/sec.375

  18. Overview of Time–Frequency Domain Parametric Spatial Audio Techniques

    Parametric Time-Frequency Domain Spatial Audio, First Edition

    Archontis Politis, Symeon Delikaris-Manias, Ville Pulkki, Pages: 69–88, 2017

    Published Online : 13 OCT 2017, DOI: 10.1002/9781119252634.ch4

  19. You have free access to this content
    Low-Power Design of Hardware One-Time Password Generators for Card-Type OTPs

    ETRI Journal

    Volume 33, Issue 4, August 2011, Pages: 611–620, Sung-Jae Lee, Jae Seong Lee, Mun-Kyu Lee, Sang Jin Lee, Doo-Ho Choi and Dong Kyue Kim

    Version of Record online : 1 AUG 2011, DOI: 10.4218/etrij.11.0110.0392

  20. SENSORLock: a lightweight key management scheme for wireless sensor networks

    Security and Communication Networks

    Volume 6, Issue 10, October 2013, Pages: 1198–1210, Juliano F. Kazienko, Igor G. Ribeiro, Igor M. Moraes and Célio Vinicius N. Albuquerque

    Version of Record online : 26 FEB 2013, DOI: 10.1002/sec.686