Verilog Coding for Logic Synthesis

Verilog Coding for Logic Synthesis

Author(s): Weng Fook Lee

Published Online: 28 JAN 2005

Print ISBN: 9780471429760

Online ISBN: 9780471457565

DOI: 10.1002/0471457566

About this Book

Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses

Table of contents