Design Through Verilog HDL

Design Through Verilog HDL

Author(s): T. R. Padmanabhan, B. Bala Tripura Sundari

Published Online: 28 JAN 2005

Print ISBN: 9780471441489

Online ISBN: 9780471723004

DOI: 10.1002/0471723002

About this Book

A comprehensive resource on Verilog HDL for beginners and experts

Large and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool.

Describing a design using Verilog is only half the story: writing test-benches, testing a design for all its desired functions, and how identifying and removing the faults remain significant challenges. Design Through Verilog HDL addresses each of these issues concisely and effectively. The authors discuss constructs through illustrative examples that are tested with popular simulation packages, ensuring the subject matter remains practically relevant.

Other important topics covered include:

  • Primitives
  • Gate and Net delays
  • Buffers
  • CMOS switches
  • State machine design

Each chapter concludes with exercises that both ensure readers have mastered the present material and stimulate readers to explore avenues of their own choosing. Written and assembled in a paced, logical manner, Design Through Verilog HDL provides professionals, graduate students, and advanced undergraduates with a one-of-a-kind resource.

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