Nano-CMOS Design for Manufacturabililty: Robust Circuit and Physical Design for Sub-65 nm Technology Nodes

Nano-CMOS Design for Manufacturabililty: Robust Circuit and Physical Design for Sub-65 nm Technology Nodes

Author(s): Ban Wong, Franz Zach, Victor Moroz, Anurag Mittal, Greg Starr, Andrew Kahng

Print ISBN: 9780470112809

Online ISBN: 9780470382820

DOI: 10.1002/9780470382820

Author Biography


About the Author

Ban P. Wong, CEng, MIET, is Director of Design Methodology at Chartered Semiconductor, Inc. He holds five patents and is the lead author of Nano-CMOS Circuit and Physical Design (Wiley).

Franz Zach, PhD, is Senior Director at PDF Solutions, where he is involved in integrated yield ramps at advanced technology nodes.

Victor Moroz, PhD, is a Principal Engineer at Synopsys. He focuses on semiconductor physics, including silicon process integration, teaching undergraduate and graduate students, and developing process simulation and DFM tools.

Anurag Mittal, PhD, Yale University, has co-developed the world's first truly CMOS-compatible Flash technology. He has several papers, invited talks, and patents to his credit. Currently he is Director of Technology & Applications at Takumi Inc., where he is developing novel EDA solutions on Design for Variability & Reliability.

Greg W. Starr, PhD, is a Supervising Principal Engineer at Xilinx, where he is responsible for advanced serial IO development on advanced processes.

Andrew Kahng, PhD, is Professor of CSE and ECE at the University of California, San Diego, and the CTO of Blaze DFM. His research focuses on integrated circuit physical design and design for manufacturability. Dr. Kahng has published more than 300 journal and conference papers.

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