Chapter 8. Failure Modes, Reliability Issues, and Case Studies

  1. Ajith Amerasekera and
  2. Charvaka Duvvury

Published Online: 23 APR 2002

DOI: 10.1002/0470846054.ch8

ESD in Silicon Integrated Circuits, Second Edition

ESD in Silicon Integrated Circuits, Second Edition

How to Cite

Amerasekera, A. and Duvvury, C. (2002) Failure Modes, Reliability Issues, and Case Studies, in ESD in Silicon Integrated Circuits, Second Edition, John Wiley & Sons, Ltd, Chichester, UK. doi: 10.1002/0470846054.ch8

Author Information

  1. Texas Instruments, Inc., USA

Publication History

  1. Published Online: 23 APR 2002
  2. Published Print: 15 APR 2002

ISBN Information

Print ISBN: 9780471498711

Online ISBN: 9780470846056

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Summary

This chapter has sections titled:

  • Introduction

  • Failure Mode Analysis

  • Reliability and Performance Considerations

  • Advanced CMOS Input Protection

  • Optimizing the Input Protection Scheme

  • Designs for Special Applications

  • Process Effects on Input Protection Design

  • Total IC Chip Protection

  • Power Bus Protection

  • Internal Chip ESD Damage

  • Stress Dependent ESD Behavior

  • Failure Mode Case Studies

  • Summary

  • Bibliography