Chapter 4. Shared-Memory Switches

  1. H. Jonathan Chao Ph.D.1,
  2. Cheuk H. Lam Ph.D.2 and
  3. Eiji Oki Ph.D.3

Published Online: 18 FEB 2002

DOI: 10.1002/0471224405.ch4

Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers

Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers

How to Cite

Chao, H. J., Lam, C. H. and Oki, E. (2001) Shared-Memory Switches, in Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers, John Wiley & Sons, Inc., New York, USA. doi: 10.1002/0471224405.ch4

Author Information

  1. 1

    Polytechnic University, Brooklyn, New York, USA

  2. 2

    Lucent Technologies, Inc., Landover, Maryland, USA

  3. 3

    NTT Network Service Systems Laboratories, Tokyo, Japan

Publication History

  1. Published Online: 18 FEB 2002
  2. Published Print: 1 SEP 2001

ISBN Information

Print ISBN: 9780471004547

Online ISBN: 9780471224402

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Keywords:

  • shared-memory;
  • shared-buffer;
  • linked list;
  • idle address FIFO;
  • random access memory (RAM);
  • content-addressable memory (CAM);
  • space-time-space;
  • multistage;
  • multicast logical queue;
  • cell copy;
  • address copy

Summary

Chapter 4 details the operation principles in different design approaches of shared-memory switches, including linked list, content-addressable memory (CAM), space-time-space, multistage. It also covers multicasting methods in shared-memory switches, including multicast logic queue, cell copy circuit, and address copy circuit.