Chapter 8. Crosspoint-Buffered Switches

  1. H. Jonathan Chao Ph.D.1,
  2. Cheuk H. Lam Ph.D.2 and
  3. Eiji Oki Ph.D.3

Published Online: 18 FEB 2002

DOI: 10.1002/0471224405.ch8

Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers

Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers

How to Cite

Chao, H. J., Lam, C. H. and Oki, E. (2001) Crosspoint-Buffered Switches, in Broadband Packet Switching Technologies: A Practical Guide to ATM Switches and IP Routers, John Wiley & Sons, Inc., New York, USA. doi: 10.1002/0471224405.ch8

Author Information

  1. 1

    Polytechnic University, Brooklyn, New York, USA

  2. 2

    Lucent Technologies, Inc., Landover, Maryland, USA

  3. 3

    NTT Network Service Systems Laboratories, Tokyo, Japan

Publication History

  1. Published Online: 18 FEB 2002
  2. Published Print: 1 SEP 2001

ISBN Information

Print ISBN: 9780471004547

Online ISBN: 9780471224402

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Keywords:

  • crosspoint-buffered switch;
  • scalability;
  • centralized arbitration;
  • distributed arbitration;
  • multiple QoS;
  • delay;
  • cell loss;
  • switch size

Summary

Chapter 8 describes several crosspoint-buffered switches, where each crosspoint has a buffer. It presents a scalable-distributed-arbitration (SDA) switch to avoid the bottleneck of the arbitration time, and an extended version of the SDA switch to support multiple quality-of-service (QoS) classes.