Standard Article

Capacitance–Voltage (C–V) Characterization of Semiconductors

Electrical and Electronic Measurement

  1. Peter A. Barnes

Published Online: 12 OCT 2012

DOI: 10.1002/0471266965.com038.pub2

Characterization of Materials

Characterization of Materials

How to Cite

Barnes, P. A. 2012. Capacitance–Voltage (C–V) Characterization of Semiconductors. Characterization of Materials. 1–11.

Author Information

  1. Department of Physics and Astronomy, Clemson University, Clemson, SC, USA

Publication History

  1. Published Online: 12 OCT 2012

Abstract

Hillibrand and Gold first described the use of capacitance -voltage (C–V) methods to determine the majority carrier concentration in semiconductors. C–V measurements are capable of yielding quantitative information about the diffusion potential and doping concentration in semiconductor materials. The technique employs p-n junctions, metal-semiconductor (MS) junctions (Schottky barriers), electrolyte-semiconductor junctions, metal-insulator-semiconductor (MIS) capacitors, and MIS field effect transistors (MISFETSs). The discussions to follow will emphasize p-n junctions and Schottky barrier techniques.

C–V measurements yield accurate information about doping concentrations of majority carriers as a function of distance (depth) from the junction. The major competing technique to C–V measurements is the Hall effect, which, while yielding added information about the carrier mobility, requires difficult, time-consuming procedures to determine carrier-depth profiles. In fact, C–V profiling and Hall measurements can be considered complementary techniques.

In concert with deep-level transient spectroscopy (DLTS), C–V measurements can quantitatively describe the free carrier concentrations together with information about traps. Defects appearing as traps at energies deep within the forbidden gap of a semiconductor can add or remove free carriers. The same Schottky diode can be used for both C–V measurements and DLTS measurements. The C–V apparatus and the DLTS apparatus are often a “bundled” setup.

C–V profiling to determine the doping profile of the mobile majority carriers in a semiconductor is a powerful quantitative technique. Some precautions must be taken, especially in dealing with multiple-layered structures such as high-to-low doping levels, quantum wells, and the presence of traps. However, most of the problems encountered have been addressed in the literature. Major considerations and precautions to be taken in dealing with C–V profiling data acquisition and reduction are also covered in the ASTM standard. The cost of assembling a C–V profiling apparatus will range between six thousand dollars for a simple, single temperature, manual apparatus to sixty thousand dollars for a fully automated apparatus. C–V profiling used in concert with deep-level transient spectroscopy to identify traps, as well as with Hall effect, to address transport mechanisms, provides a powerful set of tools at reasonable cost.

Keywords:

  • semiconductors;
  • capacitance-voltage;
  • C[BOND]V profiling;
  • traps