1. The Big Picture
Published Online: 14 MAY 2007
Copyright © 2008 the Institute of Electrical and Electronics Engineers, Inc.
VLSI Circuit Design Methodology Demystified: A Conceptual Taxonomy
How to Cite
Xiu, L. (2007) The Big Picture, in VLSI Circuit Design Methodology Demystified: A Conceptual Taxonomy, John Wiley & Sons, Inc., Hoboken, NJ, USA. doi: 10.1002/9780470199114.ch1
- Published Online: 14 MAY 2007
- Published Print: 26 OCT 2007
Print ISBN: 9780470127421
Online ISBN: 9780470199114
- logic gate timing behavior;
- transistors capacitive loading;
- standard cell methodology chip design approach
This chapter contains sections titled:
What is a chip?
What are the requirements of a successful chip design?
What are the challenges in today's very deep submicron (VDSM), multimillion gate designs?
What major process technologies are used in today's design environment?
What are the goals of new chip design?
What are the major approaches of today's very large scale integration (VLSI) circuit design practices?
What is standard cell-based, application-specific integrated circuit (ASIC) design methodology?
What is the system-on-chip (SoC) approach?
What are the driving forces behind the SoC trend?
What are the major tasks in developing a SoC chip from concept to silicon?
What are the major costs of developing a chip?