Chapter 5. Analog and Mixed-Signal Circuit Design for Yield and Manufacturability

  1. Ban Wong,
  2. Franz Zach,
  3. Victor Moroz,
  4. Anurag Mittal,
  5. Greg Starr and
  6. Andrew Kahng

Published Online: 7 FEB 2008

DOI: 10.1002/9780470382820.ch5

Nano-CMOS Design for Manufacturabililty: Robust Circuit and Physical Design for Sub-65 nm Technology Nodes

Nano-CMOS Design for Manufacturabililty: Robust Circuit and Physical Design for Sub-65 nm Technology Nodes

How to Cite

Wong, B., Zach, F., Moroz, V., Mittal, A., Starr, G. and Kahng, A. (2008) Analog and Mixed-Signal Circuit Design for Yield and Manufacturability, in Nano-CMOS Design for Manufacturabililty: Robust Circuit and Physical Design for Sub-65 nm Technology Nodes, John Wiley & Sons, Inc., Hoboken, NJ, USA. doi: 10.1002/9780470382820.ch5

Publication History

  1. Published Online: 7 FEB 2008
  2. Published Print: 6 OCT 2008

ISBN Information

Print ISBN: 9780470112809

Online ISBN: 9780470382820

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Keywords:

  • analog and mixed-signal circuit design and yield and manufacturability;
  • device matching and design guidelines;
  • voltage–controlled oscillator (VCO) and clock data recovery (CDR) circuit

Summary

This chapter contains sections titled:

  • Introduction

  • Device Selection

  • “Heartbeat” Device Size

  • Device Matching

  • Design Guidelines

  • Layout Guidelines

  • Testing

  • References