12. Interfacing

  1. Donald G. Bailey

Published Online: 2 JUN 2011

DOI: 10.1002/9780470828519.ch12

Design for Embedded Image Processing on FPGAs

Design for Embedded Image Processing on FPGAs

How to Cite

Bailey, D. G. (2011) Interfacing, in Design for Embedded Image Processing on FPGAs, John Wiley & Sons (Asia) Pte Ltd, Singapore. doi: 10.1002/9780470828519.ch12

Author Information

  1. Massey University, New Zealand

Publication History

  1. Published Online: 2 JUN 2011
  2. Published Print: 1 JUN 2011

ISBN Information

Print ISBN: 9780470828496

Online ISBN: 9780470828519

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Keywords:

  • embedded processor;
  • field programmable gate array (FPGA) interfaces;
  • serial communications

Summary

The interface logic may be thought of as a device driver, shielding the image processing hardware from much of the lower level complexities of the physical interface. The primary focus of this chapter is on some of the techniques associated with the design of such interfaces. One advantage of including an embedded processor is to provide a high level software environment for managing user interaction. Such tasks tend to be control-centric, making them more difficult to implement directly within the field programmable gate array (FPGA) fabric. However, in some applications, particularly in the context of real-time debugging, it may be desirable to implement some of these functions directly in hardware. This is a secondary focus of the chapter. Many peripheral devices communicate using some form of serial communications. The chapter briefly describes the most common peripheral devices, along with related FPGA implementation issues.

Controlled Vocabulary Terms

field programmable gate arrays; image processing