7. Histogram Operations

  1. Donald G. Bailey

Published Online: 2 JUN 2011

DOI: 10.1002/9780470828519.ch7

Design for Embedded Image Processing on FPGAs

Design for Embedded Image Processing on FPGAs

How to Cite

Bailey, D. G. (2011) Histogram Operations, in Design for Embedded Image Processing on FPGAs, John Wiley & Sons (Asia) Pte Ltd, Singapore. doi: 10.1002/9780470828519.ch7

Author Information

  1. Massey University, New Zealand

Publication History

  1. Published Online: 2 JUN 2011
  2. Published Print: 1 JUN 2011

ISBN Information

Print ISBN: 9780470828496

Online ISBN: 9780470828519

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Keywords:

  • field programmable gate array (FPGA);
  • greyscale histograms;
  • image processing;
  • multidimensional histograms

Summary

This chapter is divided into to two parts: the first considers greyscale histograms and some of their applications, and the second extends this to multidimensional histograms. There are two main steps associated with using histograms for image processing. The first step is to build the histogram, and the second is to extract data from the histogram and use it for processing the image. Building the histogram and its applications are described in the chapter. The circuitry that processes the histogram to extract data from it must operate on the same histogram. Similarly, the circuitry that resets the histogram must also be connected to the histogram memory. These require multiplexing the address and data lines to the appropriate data structures. The larger address space of a multidimensional histogram requires a significantly larger memory, which may not necessarily fit within the field programmable gate array (FPGA).

Controlled Vocabulary Terms

image processing