4. The Active and Poly Layers

  1. R. Jacob Baker

Published Online: 24 MAY 2011

DOI: 10.1002/9780470891179.ch4

CMOS: Circuit Design, Layout, and Simulation, Third Edition

CMOS: Circuit Design, Layout, and Simulation, Third Edition

How to Cite

Baker, R. J. (2010) The Active and Poly Layers, in CMOS: Circuit Design, Layout, and Simulation, Third Edition, John Wiley & Sons, Inc., Hoboken, NJ, USA. doi: 10.1002/9780470891179.ch4

Publication History

  1. Published Online: 24 MAY 2011
  2. Published Print: 27 AUG 2010

ISBN Information

Print ISBN: 9780470881323

Online ISBN: 9780470891179

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Keywords:

  • poly layers;
  • active layer;
  • poly wire;
  • suicide block;
  • NMOS device

Summary

This chapter contains sections titled:

  • Layout using the Active and Poly Layers

  • Connecting Wires to Poly and Active

  • Electrostatic Discharge (ESD) Protection