Chapter 1. Introduction to Finite-State Machines and State Diagrams for the Design of Electronic Circuits and Systems

  1. Peter Minns BSc(H), PhD, CEng, MIET and
  2. Ian Elliott BSc(H), MPhil, CEng, MIET

Published Online: 1 APR 2008

DOI: 10.1002/9780470987629.ch1

FSM-Based Digital Design Using Verilog HDL

FSM-Based Digital Design Using Verilog HDL

How to Cite

Minns, P. and Elliott, I. (2008) Introduction to Finite-State Machines and State Diagrams for the Design of Electronic Circuits and Systems, in FSM-Based Digital Design Using Verilog HDL, John Wiley & Sons, Ltd, Chichester, UK. doi: 10.1002/9780470987629.ch1

Author Information

  1. Northumbria University, UK

Publication History

  1. Published Online: 1 APR 2008
  2. Published Print: 14 MAR 2008

ISBN Information

Print ISBN: 9780470060704

Online ISBN: 9780470987629

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Keywords:

  • designing clocked finite-state machines (FSMs);
  • finite-state machines (FSMs) and state diagrams;
  • FSM-based application - block diagram;
  • FSM - digital sequential circuit;
  • Mealy state machine structure;
  • Moore state machine structure;
  • Class C state-machine structure;
  • single-pulse generator with multi-pulse feature;
  • 101 pattern-generator sequence

Summary

This chapter contains sections titled:

  • Introduction

  • Learning Material

  • Summary