35. Implementing a ∑Δ DAC in Fixed-Point Arithmetic

  1. Richard G. Lyons
  1. Shlomo Engelberg

Published Online: 11 JUN 2012

DOI: 10.1002/9781118316948.ch35

Streamlining Digital Signal Processing: A Tricks of the Trade Guidebook, Second Edition

Streamlining Digital Signal Processing: A Tricks of the Trade Guidebook, Second Edition

How to Cite

Engelberg, S. (2012) Implementing a ∑Δ DAC in Fixed-Point Arithmetic, in Streamlining Digital Signal Processing: A Tricks of the Trade Guidebook, Second Edition (ed R. G. Lyons), John Wiley & Sons, Inc., Hoboken, NJ, USA. doi: 10.1002/9781118316948.ch35

Editor Information

  1. Besser Associates, Mountain View, California, USA

Author Information

  1. Jerusalem College of Technology, Jerusalem, Israel

Publication History

  1. Published Online: 11 JUN 2012
  2. Published Print: 22 JUN 2012

ISBN Information

Print ISBN: 9781118278383

Online ISBN: 9781118316948

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Keywords:

  • efficient 8-PSK/16-PSK generation, using DA;
  • optimization, in reducing LUT exponential size;
  • LUT size, and criticality in 8-PSK, 16-PSK FIR pulse shaping;
  • 8-PSK constellation, into exact addition of two QPSK;
  • QPSK constellation superposition, complexity of DA implementations;
  • implementing a ∑Δ DAC in fixed-point arithmetic;
  • simple sigma delta (∑Δ) DAC, on simplest of microprocessors;
  • lowpass filter and final output, to value of constant, being the input;
  • ∑Δ DAC performance;
  • DAC implementation with a minimum of instructions

Summary

This chapter contains sections titled:

  • The ∑Δ DAC Process

  • ∑Δ DAC Performance

  • Implementation

  • Conclusions

  • References