4. Low-Cost VLSI Architecture for Random Block-Based Access of Pixels in Modern Image Sensors

  1. Krzysztof Iniewski
  1. Tareq Hasan Khan and
  2. Khan Wahid

Published Online: 6 NOV 2012

DOI: 10.1002/9781118468654.ch4

Embedded Systems: Hardware, Design, and Implementation

Embedded Systems: Hardware, Design, and Implementation

How to Cite

Khan, T. H. and Wahid, K. (2012) Low-Cost VLSI Architecture for Random Block-Based Access of Pixels in Modern Image Sensors, in Embedded Systems: Hardware, Design, and Implementation (ed K. Iniewski), John Wiley & Sons, Inc., Hoboken, NJ, USA. doi: 10.1002/9781118468654.ch4

Editor Information

  1. CMOS Emerging Technologies Research, USA

Author Information

  1. Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatchewan, Canada

Publication History

  1. Published Online: 6 NOV 2012
  2. Published Print: 14 DEC 2012

ISBN Information

Print ISBN: 9781118352151

Online ISBN: 9781118468654

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Keywords:

  • low-cost VLSI for block-based, in modern image sensors;
  • iBRIDGE-BB architecture, configuring/operation;
  • internal blocks and description, sensor control;
  • hardware, verification in field-programmable gate array;
  • ASIC synthesis and performance analysis

Summary

This chapter contains sections titled:

  • Introduction

  • The DVP Interface

  • The iBRIDGE-BB Architecture

  • Hardware Implementation

  • Conclusion

  • Acknowledgments

  • References