13. Theoretical Progress on GaAs (001) Surface and GaAs/High-k Interface

  1. Prof. Gang He and
  2. Prof. Zhaoqi Sun
  1. Weichao Wang1,
  2. Ka Xiong1,
  3. Robert M. Wallace1,2 and
  4. Kyeongjae Cho1,2

Published Online: 23 AUG 2012

DOI: 10.1002/9783527646340.ch13

High-k Gate Dielectrics for CMOS Technology

High-k Gate Dielectrics for CMOS Technology

How to Cite

Wang, W., Xiong, K., Wallace, R. M. and Cho, K. (2012) Theoretical Progress on GaAs (001) Surface and GaAs/High-k Interface, in High-k Gate Dielectrics for CMOS Technology (eds G. He and Z. Sun), Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim, Germany. doi: 10.1002/9783527646340.ch13

Editor Information

  1. Anhui University, School of Physics and Materials Science, Anhui Key Laboratory of Information Materials and Devices, Feixi Road 3, Hefei 230039, China

Author Information

  1. 1

    The University of Texas at Dallas, Department of Materials Science & Engineering, 800 W. Campbell Road, RL10, Richardson, TX 75080, USA

  2. 2

    The University of Texas at Dallas, Department of Physics, 800 W. Campbell Rd., RL10, Richardson, TX 75080, USA

Publication History

  1. Published Online: 23 AUG 2012
  2. Published Print: 22 AUG 2012

ISBN Information

Print ISBN: 9783527330324

Online ISBN: 9783527646340

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Keywords:

  • chemical potential;
  • dangling bond;
  • Fermi-level pinning;
  • gap state;
  • interface state;
  • surface reconstruction

Summary

This chapter contains sections titled:

  • Introduction

  • Computational Method

  • GaAs Surface Oxidation and Passivation

  • Origin of Gap States at the High-k/GaAs Interface and Interface Passivation

  • Conclusions

  • References