17. The Interaction Challenges with Novel Materials in Developing High-Performance and Low-Leakage High-k/Metal Gate CMOS Transistors

  1. Prof. Gang He and
  2. Prof. Zhaoqi Sun
  1. Michael Chudzik,
  2. Siddarth Krishnan,
  3. Unoh Kwon,
  4. Mukesh Khare,
  5. Vijay Narayanan,
  6. Takashi Ando,
  7. Ed Cartier,
  8. Huiming Bu and
  9. Vamsi Paruchuri

Published Online: 23 AUG 2012

DOI: 10.1002/9783527646340.ch17

High-k Gate Dielectrics for CMOS Technology

High-k Gate Dielectrics for CMOS Technology

How to Cite

Chudzik, M., Krishnan, S., Kwon, U., Khare, M., Narayanan, V., Ando, T., Cartier, E., Bu, H. and Paruchuri, V. (2012) The Interaction Challenges with Novel Materials in Developing High-Performance and Low-Leakage High-k/Metal Gate CMOS Transistors, in High-k Gate Dielectrics for CMOS Technology (eds G. He and Z. Sun), Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim, Germany. doi: 10.1002/9783527646340.ch17

Editor Information

  1. Anhui University, School of Physics and Materials Science, Anhui Key Laboratory of Information Materials and Devices, Feixi Road 3, Hefei 230039, China

Author Information

  1. IBM Semiconductor Research and Development Center (SRDC), IBM Systems and Technology Division, Hopewell Junction, NY 12533, USA

Publication History

  1. Published Online: 23 AUG 2012
  2. Published Print: 22 AUG 2012

ISBN Information

Print ISBN: 9783527330324

Online ISBN: 9783527646340

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Keywords:

  • carrier mobility;
  • CMOS transistors;
  • gate leakage;
  • oxygen vacancy;
  • reliability;
  • work function

Summary

This chapter contains sections titled:

  • Introduction

  • Traditional CMOS Integration Processes

  • High-k/Metal Gate Integration Processes

  • Mobility

  • Metal Electrodes and Effective Work Function

  • Tinv Scaling and Impacts on Gate Leakage and Effective Work Function

  • Ambients and Oxygen Vacancy-Induced Modulation of Threshold Voltage

  • Reliability

  • Conclusions

  • References