Two Series Oxide Resistors Applicable to High Speed and High Density Nonvolatile Memory


  • B.H.P. was supported by Samsung Advanced Institute of Technology, grant No. 2007-00632 from the Nuclear R&D Programm of the Korea Science & Engineering Foundation, Korean Research Foundation Grant (KRF-2004-005-D00046), Seoul R&BD Program, Konkuk University and the National Research Program for the 0.1 Terabit Non-volatile Memory Development sponsored by the Korea Ministry of Commerce, Industry, and Energy.


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A memory cell consisting of a Pt/VO2/Pt switch element and a Pt/NiO/Pt memory element connected in series. By applying a voltage higher than Vth of 0.6 V, the switch element reaches the on state and the cell can be accessed. Since reset and set voltages are higher than Vth, information can be written by simply applying an appropriate voltage to a selected cell. By applying a voltage lower than Vth to the other cells, we can keep the other cells in the off state and prevent interference between the selected cell and the others.