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Design of Battery Electrodes with Dual-Scale Porosity to Minimize Tortuosity and Maximize Performance

Authors

  • Chang-Jun Bae,

    1. Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139, USA
    Current affiliation:
    1. C.J.B. and C.K.E. contributed equally to this work.
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    • Hardware System Laboratory, Palo Alto Research Center (PARC), 3333 Coyote Hill Road, Palo Alto, CA 94304, USA

  • Can K. Erdonmez,

    1. Energy Storage Group, Brookhaven National Laboratory, Upton, NY 11973, USA
    Current affiliation:
    1. C.J.B. and C.K.E. contributed equally to this work.
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  • John W. Halloran,

    1. Materials Science and Engineering, University of Michigan, Ann Arbor, MI 48109, USA
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  • Yet-Ming Chiang

    Corresponding author
    1. Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139, USA
    • Materials Science and Engineering, Massachusetts Institute of Technology, Cambridge, MA 02139, USA.
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Abstract

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Electrode pore topology can be tuned to improve battery power without sacrificing energy density. One effective design has “dual-scale” porosity, combining aligned channels and a porous matrix. Iterated co-extrusion yields sintered cathodes of this architecture, with channel spacing tunable down to ∼15 μm. Results show that net tortuosity is reduced compared to homogeneous porosity, significantly improving cell-discharge rates.

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