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Advanced Materials

Patterning: High Aspect Ratio Sub-15 nm Silicon Trenches From Block Copolymer Templates (Adv. Mater. 42/2012)

Authors

  • Xiaodan Gu,

    1. Department of Polymer Science and Engineering, University of Massachusetts Amherst, Amherst, Massachusetts 01003, USA
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  • Zuwei Liu,

    1. Oxford Instruments, Concord, MA 01742, USA
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  • Ilja Gunkel,

    1. Advanced Light Source, Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720, USA
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  • S. T. Chourou,

    1. Advanced Light Source, Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720, USA
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  • Sung Woo Hong,

    1. Department of Polymer Science and Engineering, University of Massachusetts Amherst, Amherst, Massachusetts 01003, USA
    Current affiliation:
    1. Samsung Advanced Institute of Technology (SAIT), Mt. 14-1, Nongseo-dong, Giheung-gu, Yongin-si, Gyeonggi-do 446-712, Republic of Korea
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  • Deirdre L. Olynick,

    Corresponding author
    1. Molecular Foundry, Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720, USA
    • Molecular Foundry, Lawrence Berkeley National Laboratory, 1 Cyclotron Road, Berkeley, CA 94720, USA
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  • Thomas P. Russell

    Corresponding author
    1. Department of Polymer Science and Engineering, University of Massachusetts Amherst, Amherst, Massachusetts 01003, USA
    • Department of Polymer Science and Engineering, University of Massachusetts Amherst, Amherst, Massachusetts 01003, USA.
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Abstract

On page 5688, Thomas P. Russell, Deirdre L. Olynick, and co-workers show that high-aspect-ratio sub-15-nm silicon nanotrenches can be directly patterned from low temperature plasma etching of a block copolymer mask. This method allows the patterning of silicon with sub-15-nm structures on wafer size scale, and with high thoughput and relatively low cost.

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