On page 5688, Thomas P. Russell, Deirdre L. Olynick, and co-workers show that high-aspect-ratio sub-15-nm silicon nanotrenches can be directly patterned from low temperature plasma etching of a block copolymer mask. This method allows the patterning of silicon with sub-15-nm structures on wafer size scale, and with high thoughput and relatively low cost.
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