Write Current Reduction in Transition Metal Oxide Based Resistance Change Memory (pages 924–928)
S.-E. Ahn, M.-J. Lee, Y. Park, B. S. Kang, C. B. Lee, K. H. Kim, S. Seo, D.-S. Suh, D.-C. Kim, J. Hur, W. Xianyu, G. Stefanovich, H. Yin, I.-K. Yoo, J.-H. Lee, J.-B. Park, I.-G. Baek and B. H. Park
Article first published online: 5 FEB 2008 | DOI: 10.1002/adma.200702081
A novel memory cell structure with a Pt/Ti-doped NiO/Pt architecture is shown to exhibit the lowest write current reported thus far for a unipolar switching resistance-change-based device, as shown in the figure. The write current decreases dramatically upon scaling to cell sizes smaller than 100 nm×100 nm. High-density universal memory can be fabricated by combining this node element with a selective switch.