A method of a reliability synthesis for a system with control loops is proposed by introducing a concept which we call a critical transition set. The set is an extended set of an exact failure mode and is important in that each occurrence of the system failure has to correspond to a mode in the set. This means that the system can be improved in such a way as to eliminate all the dominant modes in the set.
First, the system diagram is obtained by connecting outputs of components to the inputs of succeeding components. Time delays are introduced in the feedback loops to represent the internal system state (memory). Then, the components are modeled by decision tables. The critical transition set can be obtained easily by simple tabular manipulations once the system failure is defined. Finally, the system reliability and availability improvements are made based on the set.