Get access
Advertisement

Determining the target value of ACICD to optimize the electrical characteristics of semiconductors using dual response surface optimization

Authors

  • Dong-Hee Lee,

    1. System LSI Division, Semiconductor Business, Samsung Electronics, Yongin, Korea
    Search for more papers by this author
  • Kwang-Jae Kim

    Corresponding author
    1. Department of Industrial and Management Engineering, Pohang University of Science and Technology, Namgu Pohang, Korea
    • Correspondence to: Kwang-Jae Kim, Department of Industrial and Management Engineering, Pohang University of Science and Technology, Namgu Pohang, Korea.

      E-mail: kjk@postech.ac.kr

    Search for more papers by this author

Abstract

After Cleaning Inspection Critical Dimension (ACICD), one of the main variables in the etch process, affects the electrical characteristics of fabricated semiconductor chips. Its target value should be determined to minimize the bias and variability of these electrical characteristics. This paper presents a case study in which the target value of ACICD is determined by the dual response optimization method. In particular, the recently developed posterior approach to dual response optimization is employed allowing the analyst to determine easily the optimal compromise between bias and variability in the electrical characteristics. The performance at the obtained optimal ACICD setting has been shown to be better than that at the existing setting. Copyright © 2013 John Wiley & Sons, Ltd.

Get access to the full text of this article

Ancillary