Special Issue Paper
Performance analysis of multi-level parallelism: inter-node, intra-node and hardware accelerators
Article first published online: 14 APR 2011
Copyright © 2011 John Wiley & Sons, Ltd.
Concurrency and Computation: Practice and Experience
Special Issue: Special Section on Challenges and Solutions in Multicore and Many-Core Computing
Volume 24, Issue 1, pages 62–72, January 2012
How to Cite
Hackenberg, D., Juckeland, G. and Brunst, H. (2012), Performance analysis of multi-level parallelism: inter-node, intra-node and hardware accelerators. Concurrency Computat.: Pract. Exper., 24: 62–72. doi: 10.1002/cpe.1725
- Issue published online: 27 DEC 2011
- Article first published online: 14 APR 2011
- Manuscript Accepted: 30 JAN 2011
- Manuscript Received: 1 SEP 2010
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