Research Article

Programming many-core architectures - a case study: dense matrix computations on the Intel single-chip cloud computer processor

  1. Bryan Marker1,*,
  2. Ernie Chan1,
  3. Jack Poulson2,
  4. Robert van de Geijn1,
  5. Rob F.  Van der Wijngaart3,
  6. Timothy G. Mattson4,
  7. Theodore E. Kubaska5

Article first published online: 15 AUG 2011

DOI: 10.1002/cpe.1832

Issue

Concurrency and Computation: Practice and Experience

Concurrency and Computation: Practice and Experience

Volume 24, Issue 12, pages 1317–1333, 25 August 2012

Additional Information

How to Cite

Marker, B., Chan, E., Poulson, J., van de Geijn, R.,  Van der Wijngaart, Rob F., Mattson, T. G. and Kubaska, T. E. (2012), Programming many-core architectures - a case study: dense matrix computations on the Intel single-chip cloud computer processor. Concurrency Computat.: Pract. Exper., 24: 1317–1333. doi: 10.1002/cpe.1832

Author Information

  1. 1

    Dept. of Computer Science, The Univ. of Texas at Austin, Austin, Texas 78712

  2. 2

    Institute for Computational Engineering and Sciences, The Univ. of Texas at Austin, Austin, Texas 78712

  3. 3

    Intel Corporation, Santa Clara, California 95054

  4. 4

    Intel Corporation, DuPont, Washington 98327

  5. 5

    IntelCorporation, Hillsboro, Oregon 97124

*Bryan Marker, Dept. of Computer Science, The Univ. of Texas at Austin, Austin, Texas 78712.
E-mail:bamarker@cs.utexas.edu

Publication History

  1. Issue published online: 4 AUG 2012
  2. Article first published online: 15 AUG 2011
  3. Manuscript Accepted: 26 JUN 2011
  4. Manuscript Revised: 24 JUN 2011
  5. Manuscript Received: 21 MAR 2011

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Keywords:

  • collective communication;
  • dense linear algebra library;
  • many-core architecture

SUMMARY

A message passing, distributed-memory parallel computer on a chip is one possible design for future, many-core architectures. We discuss initial experiences with the Intel Single-chip Cloud Computer research processor, which is a prototype architecture that incorporates 48 cores on a single die that can communicate via a small, shared, on-die buffer. The experiment is to port a state-of-the-art, distributed-memory, dense matrix library, Elemental, to this architecture and gain insight from the experience. We show that programmability addressed by this library, especially the proper abstraction for collective communication, greatly aids the porting effort. This enables us to support a wide range of functionality with limited changes to the library code. Copyright © 2011 John Wiley & Sons, Ltd.

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