Research Article
Identification and authentication of integrated circuits
Article first published online: 6 AUG 2004
DOI: 10.1002/cpe.805
Copyright © 2004 John Wiley & Sons, Ltd.
Issue
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Concurrency and Computation: Practice and Experience
Special Issue: Computer Security
Volume 16, Issue 11, pages 1077–1098, September 2004
Additional Information
How to Cite
Gassend, B., Lim, D., Clarke, D., van Dijk, M. and Devadas, S. (2004), Identification and authentication of integrated circuits. Concurrency Computat.: Pract. Exper., 16: 1077–1098. doi: 10.1002/cpe.805
Publication History
- Issue published online: 6 AUG 2004
- Article first published online: 6 AUG 2004
- Manuscript Revised: JUN 2003
- Manuscript Accepted: JUN 2003
- Manuscript Received: MAR 2003
- Abstract
- References
- Cited By
Keywords:
- authentication;
- identification;
- physical random function;
- physical security;
- smartcard;
- tamper resistance;
- unclonability
Abstract
This paper describes a technique to reliably and securely identify individual integrated circuits (ICs) based on the precise measurement of circuit delays and a simple challenge–response protocol. This technique could be used to produce key-cards that are more difficult to clone than ones involving digital keys on the IC. We consider potential venues of attack against our system, and present candidate implementations. Experiments on Field Programmable Gate Arrays show that the technique is viable, but that our current implementations could require some strengthening before it can be considered as secure. Copyright © 2004 John Wiley & Sons, Ltd.

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