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Asymmetric halo and symmetric Single-Halo Dual-Material Gate and Double-Halo Dual-Material Gate n-MOSFETs characteristic parameter modeling


Angsuman Sarkar, Assistant Professor, Electronics and Communication Engineering Department, Kalyani Government Engineering College, Kalyani 741235, India.



This paper presents an analytical subthreshold surface potential model of novel structures called asymmetric pocket-implanted Double-Halo Dual-Material Gate (DHDMG) and Single-Halo Dual-Material Gate (SHDMG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET), which combines the advantages of both the channel engineering (halo) and the gate engineering techniques (dual-material gate) to effectively suppress the short-channel effects (SCEs). The model is derived using the pseudo-2D analysis by applying the Gauss's law to an elementary rectangular box in the channel depletion region, considering the surface potential variation with the channel depletion layer depth. The asymmetric pocket-implanted model takes into account the effective doping concentration of the two linear pocket profiles at the source and the drain ends. The inner fringing field capacitances are also considered in the model for accurate estimation of the subthreshold surface potential at the two ends of the MOSFET. The same model is used to find the characteristic parameters for dual-material gate with single-halo and double-halo implantations. It is concluded that the DHDMG device structure exhibits better suppression of the SCEs and the threshold voltage roll-off than a pocket-implanted and SHDMG MOSFET after investigating the characteristics parameter improvement. In order to validate our model, the modeled expressions have been extensively compared with the simulated characteristics obtained from the 2D device simulator DESSIS. A nice agreement is achieved with a reasonable accuracy over a wide range of device parameter and bias condition. Copyright © 2012 John Wiley & Sons, Ltd.