Thermal performance of nanoscale InGaP/GaAs collector-up heterojunction bipolar transistors investigated by the advanced optimization technique

Authors

  • Hsien-Cheng Tseng,

    Corresponding author
    1. Nanotechnology R & D Center and Department of Electronic Engineering, Kun Shan University, Tainan, Taiwan
    • Correspondence to: Hsien-Cheng Tseng, Nanotechnology R & D Center and Department of Electronic Engineering, Kun Shan University, Tainan 71003, Taiwan.

      E-mail: hctseng3@ceg.com.tw

    Search for more papers by this author
  • Jeng-Ming Wu

    1. Nanotechnology R & D Center and Department of Electronic Engineering, Kun Shan University, Tainan, Taiwan
    Search for more papers by this author

SUMMARY

The effects of thermal-dissipation structure on the thermal performance of nanoscale InGaP/GaAs collector-up heterojunction bipolar transistors were investigated by using the advanced hybrid optimization technique, a combination of the three-dimensional finite-element method for temperature-distribution analysis and the technology computer-aided design tool for power-performance evaluation. Through adequately locating the thermal-dissipation structure at the rear side of the transistor and via effective thickness-thinning procedures, which reduce foundry cost, the thermal coupling between collector fingers has been greatly ameliorated and a power-added efficiency of 45% is achieved. Copyright © 2013 John Wiley & Sons, Ltd.

Ancillary