Recent trends in compact device modelling and circuit simulation suggest a growing movement towards standardization of Verilog-A as a vehicle for semiconductor device specification and model interchange among commercial and open source simulators. This paper introduces a nonlinear equation-defined device (EDD) characterized by current, voltage and charge equations with a similar syntax to Verilog-A. The EDD has been implemented in Qucs and used extensively as a central feature in an interactive modelling system that allows straightforward prototyping of compact device models prior to translation into Verilog-A. To illustrate the properties and the use of the Qucs EDD a number of examples centred on well-known SPICE models are described. Copyright © 2008 John Wiley & Sons, Ltd.