The compact d.c. electrothermal model of power MOSFETs for SPICE

Authors

  • Janusz Zarębski

    Corresponding author
    1. Department of Marine Electronics, Gdynia Maritime University, Morska 83, 81-225 Gdynia, Poland
    • Department of Marine Electronics, Gdynia Maritime University, Morska 83, 81-225 Gdynia, Poland
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Abstract

This paper concerns the problem of modelling of power MOS transistors in SPICE. In the paper the new form of the electrothermal d.c. model (ETM) of the considered class of power devices is proposed. The ETM is based on the modified Shichman–Hodges model, in which the generation current, the breakdown voltage, the sub-threshold region, the thermally dependent series resistances and self-heating are included. The device inner temperature calculated from the thermal model is the sum of the ambient temperature and the product of the electrical power dissipated inside the device and its thermal resistance. The presented model has been verified experimentally. The results of calculations and measurements of MTD15N06V (ON Semiconductor) and IRF840 (International Rectifier) transistors are given as well. Copyright © 2009 John Wiley & Sons, Ltd.

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