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Keywords:

  • Si heterojunction;
  • interface passivation;
  • surface recombination velocity;
  • open-circuit voltage

ABSTRACT

In this paper, we describe a technique for high-quality interface passivation of n-type crystalline silicon wafers through the growth of hydrogenated amorphous Si (a-Si:H) thin layers using conventional plasma-enhanced chemical vapor deposition. We investigated the onset of crystallization of the a-Si:H layers at various deposition rates and its effect on the surface passivation properties. Epitaxial growth occurred, even at a low substrate temperature of 90 °C, when the deposition rate was as low as 0·5 Å/s; amorphous growth occurred at temperatures up to 150 °C at a higher deposition rate of 4·2 Å/s. After optimizing the intrinsic a-Si:H layer deposition conditions and then subjecting the sample to post-annealing treatment, we achieved a very low surface recombination velocity (7·6 cm/s) for a double-sided intrinsic a-Si:H coating on an n-type crystalline silicon wafer. Under the optimized conditions, we achieved an untextured heterojunction cell efficiency of 16·7%, with a high open-circuit voltage (694 mV) on an n-type float-zone Si substrate. On a textured wafer, the cell efficiency was further enhanced to 19·6%. Copyright © 2011 John Wiley & Sons, Ltd.