Comparative performance analysis of silicon nanowire tunnel FETs and MOSFETs on plastic substrates in flexible logic circuit applications

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Abstract

We report on the fabrication and electrical comparison between flexible tunnel field-effect transistors (TFETs) and metal–oxide–semiconductor FETs (MOSFETs) on plastic substrates from device to circuit performance by use of fully CMOS-compatible silicon nanowires (SiNWs) as the channel material. The SiNW TFETs exhibit ION/IOFF ratio of ∼105, which is about an order of magnitude lower than that of their MOSFET counterparts, viz. ∼106, mainly due to their high turn-on voltage and low band-to-band tunneling (BTBT) efficiency. The SiNW complementary TFET (c-TFET) inverter shows ultralow DC power consumption (at VDD = 3 V, Ppeak = 11.4 nW and Pstby = 26.8 pW, respectively), which are about three to four orders of magnitude lower than those of the SiNW CMOS inverter, viz. 17.4 µW and 0.39 µW, respectively. Due to the different pros and cons for each of these devices, our top–down approach should open up the opportunity to integrate SiNW TFETs with SiNW MOSFETs on one plastic substrate for flexible hybrid SiNW TFET-MOSFET integrated circuits, where both high-performance and low-power functionality are required.

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