This paper proposes a Bayesian design approach to planning a pre-production accelerated design test (ADT) with physically based statistical models. To motivate the study, we consider the hot-carrier-induced degradation of modern MOS field effect transistors. A single-path power-law statistical degradation model with nonlinear stress–life relationships is first developed. Based on this model, we formulate a Bayesian optimal design problem that minimizes the expected pre-posterior variance of the quantity of interest at use environment. To solve the problem, a simulation-based stochastic optimization method, which yields a consistent estimate of the optimal design, is utilized. As demonstrated by the numerical example, such an algorithm is of great practical importance in planning an ADT because it is considerably faster than the commonly used Monte Carlo simulation for evaluating the expected pre-posterior variance. Finally, we perform a comparison study between the proposed Bayesian plan and the locally optimal plan, which is based on the maximum likelihood theory. Results strongly suggest that the robustness of the proposed plan against the uncertainty associated with planning inputs can be significantly enhanced. Copyright © 2010 John Wiley & Sons, Ltd.