Special Issue Paper
A low-cost UHF RFID tag chip with AES cryptography engine
Article first published online: 9 MAY 2013
Copyright © 2013 John Wiley & Sons, Ltd.
Security and Communication Networks
Volume 7, Issue 2, pages 365–375, February 2014
How to Cite
Fu, L., Shen, X., Zhu, L. and Wang, J. (2014), A low-cost UHF RFID tag chip with AES cryptography engine. Security Comm. Networks, 7: 365–375. doi: 10.1002/sec.723
- Issue published online: 28 JAN 2014
- Article first published online: 9 MAY 2013
- Manuscript Accepted: 12 DEC 2012
- Manuscript Received: 30 SEP 2012
- low-cost, low-power;
- security and privacy;
- chip design
In this paper, the design of a low-cost ultra-high-frequency (UHF) Radio Frequency IDentification (RFID) tag chip with an advanced encryption standard (AES) cryptographic engine is presented. The design of digital baseband is verified on a Field-Programmable Gate Array (FPGA) platform. The whole chip, including a radio frequency frontend, an analog frontend, an Electrically Erasable Programmable Read-Only Memory (EEPROM), and a baseband with AES engine, is taped out on Semiconductor Manufacturing International Corporation (SMIC) 0.13μm process. The chip area is 1 × 1 mm2, in which 0.6 × 0.3 mm2 is covered by the digital baseband. The power consumption of the entire tag chip is 20.9 μW. The design can work on both two modes of the standard ISO 18000-6C mode and the security enhanced ISO 18000-6C mode. To the best of our knowledge, it is the first UHF passive RFID tag chip with AES algorithm in the baseband.