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Ferroelectric Thin Films in Fluidic Environments: A New Interface for Sensing and Manipulation of Matter

Authors

  • Robert Ferris,

    1. Department of Mechanical Engineering and Material Science, Duke University, 144 Hudson Hall, Durham, NC, 27708, USA
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  • Benjamin Yellen,

    1. Department of Mechanical Engineering and Material Science, Duke University, 144 Hudson Hall, Durham, NC, 27708, USA
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  • Stefan Zauscher

    Corresponding author
    1. Department of Mechanical Engineering and Material Science, Duke University, 144 Hudson Hall, Durham, NC, 27708, USA
    • Department of Mechanical Engineering and Material Science, Duke University, 144 Hudson Hall, Durham, NC, 27708, USA.

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Abstract

For decades ferroelectric thin films (FETFs) have been the focus of research and development for next-generation memory and semiconductor devices. FETFs are attractive because their polarization states are highly localized, stable, and switchable. These unique properties are also attractive for (bio)molecular sensing and separation applications. Polarization of both polymer and ceramic FETF results in the expression of a sustained high, non-Faradaic, surface charge density. If these surface charges are maintained in aqueous environments, then the resulting electrostatic forces should induce the formation of electrolyte gradients and aid in the localization of charged species to the surface. Recently, there has been a growing interest in the interfacial properties of FETFs, specifically how they interact with liquid or gaseous phases. Recent work has shown that the FETF polarization state affects adsorption from the gaseous phase, surface catalysis, and cell growth. Encouraged by these findings, the use of FETFs in aqueous environments is explored. After an introduction to FETFs, the growing body of literature on the FETF interface is reviewed, along with the limited number of studies demonstrating FETF function in gas and liquid environments. Finally, the exciting possibilities that FETFs could bring to interfacial engineering and lab-on-chip (LOC) device design is reviewed.

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