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Wafer-Scale Patterning of Reduced Graphene Oxide Electrodes by Transfer-and-Reverse Stamping for High Performance OFETs

Authors

  • Joong Suk Lee,

    1. Department of Organic Materials and Fiber Engineering, Soongsil University, Seoul 156-746, Republic of Korea
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  • Nam Hee Kim,

    1. School of Chemical Engineering and Materials Science, Chung-Ang University, Seoul 156-756, Republic of Korea
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  • Moon Sung Kang,

    1. Department of Chemical Engineering, Soongsil University, Seoul 156-746, Republic of Korea
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  • Hojeong Yu,

    1. School of Nano-Bioscience and Chemical Engineering, KIER-UNIST Advanced Center for Energy, Ulsan National Institute of Science and Technology (UNIST), Ulsan 689-798, Republic of Korea
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  • Dong Ryoul Lee,

    1. Department of Physics, Soongsil University, Seoul 156-743, Republic of Korea
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  • Joon Hak Oh,

    1. School of Nano-Bioscience and Chemical Engineering, KIER-UNIST Advanced Center for Energy, Ulsan National Institute of Science and Technology (UNIST), Ulsan 689-798, Republic of Korea
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  • Suk Tai Chang,

    Corresponding author
    1. School of Chemical Engineering and Materials Science, Chung-Ang University, Seoul 156-756, Republic of Korea
    • School of Chemical Engineering and Materials Science, Chung-Ang University, Seoul 156-756, Republic of Korea.
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  • Jeong Ho Cho

    Corresponding author
    1. SKKU Advanced Institute of Nanotechnology (SAINT), Center for Human Interface Nano Technology (HINT), and School of Chemical Engineering, Sungkyunkwan University, Suwon 440-746, Republic of Korea
    • SKKU Advanced Institute of Nanotechnology (SAINT), Center for Human Interface Nano Technology (HINT), and School of Chemical Engineering, Sungkyunkwan University, Suwon 440-746, Republic of Korea
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Abstract

A wafer-scale patterning method for solution-processed graphene electrodes, named the transfer-and-reverse stamping method, is universally applicable for fabricating source/drain electrodes of n- and p-type organic field-effect transistors with excellent performance. The patterning method begins with transferring a highly uniform reduced graphene oxide thin film, which is pre-prepared on a glass substrate, onto hydrophobic silanized (rigid/flexible) substrates. Patterns of the as-prepared reduced graphene oxide films are then formed by modulating the surface energy of the films and selectively delaminating the films using an oxygen-plasma-treated elastomeric stamp with patterns. Reduced graphene oxide patterns with various sizes and shapes can be readily formed onto an entire wafer. Also, they can serve as the source/drain electrodes for benchmark n- and p-type organic field-effect transistors with enhanced performance, compared to those using conventional metal electrodes. These results demonstrate the general utility of this technique. Furthermore, this simple, inexpensive, and scalable electrode-patterning-technique leads to assembling organic complementary circuits onto a flexible substrate successfully.

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