This work extends our earlier conference submission, titled Eliminating False Phase Interactions to Reduce Optimization Phase Order Search Space, published in the ACM Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2010. We extend this earlier work by conducting a more thorough investigation with additional benchmarks, validation for many of our earlier experiments with SimpleScalar cycle-accurate simulation and native runs of the latest ARM hardware, more detailed analysis of the results, and re-evaluating and updating our description and conclusions. We also perform new studies (entire Section 7) in this paper that have never been reported.
Analyzing and addressing false interactions during compiler optimization phase ordering
Version of Record online: 22 JAN 2013
Copyright © 2013 John Wiley & Sons, Ltd.
Software: Practice and Experience
Volume 44, Issue 6, pages 643–679, June 2014
How to Cite
Jantz, M. R. and Kulkarni, P. A. (2014), Analyzing and addressing false interactions during compiler optimization phase ordering. Softw: Pract. Exper., 44: 643–679. doi: 10.1002/spe.2176
- Issue online: 6 MAY 2014
- Version of Record online: 22 JAN 2013
- Manuscript Accepted: 25 NOV 2012
- Manuscript Revised: 21 NOV 2012
- Manuscript Received: 11 NOV 2011
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