Special Issue on Electronics, Information and Systems / Special Issue Paper
Analysis of Snapback Phenomena in VDMOS Transistor having the High Second Breakdown Current: A High ESD Mechanism Analysis
Article first published online: 26 OCT 2009
Copyright © 2009 Institute of Electrical Engineers of Japan
IEEJ Transactions on Electrical and Electronic Engineering
Special Issue: Special Issue on Electronics, Information and Systems
Volume 4, Issue 6, pages 720–724, November 2009
How to Cite
Hatasako, K., Yamamoto, F., Uenishi, A., Kuroi, T. and Maegawa, S. (2009), Analysis of Snapback Phenomena in VDMOS Transistor having the High Second Breakdown Current: A High ESD Mechanism Analysis. IEEJ Trans Elec Electron Eng, 4: 720–724. doi: 10.1002/tee.20470
- Issue published online: 26 OCT 2009
- Article first published online: 26 OCT 2009
- Manuscript Revised: 4 JUN 2009
- Manuscript Received: 27 FEB 2009
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