Rendering (Session 2)
A Programmable Graphics Processor based on Partial Stream Rewriting
Article first published online: 25 NOV 2013
© 2013 The Author(s) Computer Graphics Forum © 2013 The Eurographics Association and John Wiley & Sons Ltd.
Computer Graphics Forum
Volume 32, Issue 7, pages 325–334, October 2013
How to Cite
Middendorf, L. and Haubelt, Ch. (2013), A Programmable Graphics Processor based on Partial Stream Rewriting. Computer Graphics Forum, 32: 325–334. doi: 10.1111/cgf.12240
- Issue published online: 25 NOV 2013
- Article first published online: 25 NOV 2013
- Computer Graphics [I.3.3]: Three-Dimensional Graphics and Realism—Display Algorithms
Current graphics processing units (GPU) typically offer only a limited number of programmable pipeline stages, whose usage, data flow and topology are mostly fixed. Although a more flexible, custom rendering pipeline can be emulated using the compute functionality of existing GPUs, this approach requires to manage work queues, synchronization, and scheduling in software. In this paper, we present a hardware architecture for a novel, programmable rendering pipeline, which is based on a circulating stream of data and control tokens that are iteratively modified via pattern matching. Our architecture provides light-weight mechanisms for dynamic thread creation, lock-free synchronization, and scheduling to support recursion, dynamic shader linkage and custom primitive types. A hardware prototype, running complex examples, demonstrates the improved reconfigurability also the scalability of our graphics architecture.