Achieving 21.4% Efficient CdSeTe/CdTe Solar Cells Using Highly Resistive Intrinsic ZnO Buffer Layers

In this study, the use of intrinsic and highly insulating ZnO buffer layers to achieve high conversion efficiencies in CdSeTe/CdTe solar cells is reported. The buffer layers are deposited on commercial SnO2:F coated soda‐lime glass substrates and then fabricated into arsenic‐doped CdSeTe/CdTe devices using an absorber and back contact deposited by First Solar. The ZnO thickness is varied from 30 to 200 nm. The devices incorporating a 50 nm ZnO buffer layer achieved an efficiency of 21.23% without an anti‐reflection coating. An improved efficiency of 21.44% is obtained on a substrate with a multilayer anti‐reflection coating deposited prior to device fabrication. The highly efficient ZnO based devices are stable and do not develop anomalous J‐V behavior following environmental tests. High resolution microstructural analysis reveals the formation of a high‐quality ZnO/CdSeTe interface. Unusually, chlorine is not detected as a discrete layer at the interface, these observations point to a high‐quality interface. The extrapolation of Voc to 0 K indicates that interface recombination dominates, suggesting that further improvement is possible. Using device modeling, an attempt is made to understand how this type of device performs so well.


Introduction
Cadmium telluride (CdTe)-based solar cells are the most commercially successful thin film photovoltaic (PV) technology. [1]OI: 10.1002/adfm.202312528   CdTe is a direct bandgap material with a large absorption coefficient (>10 4 cm −1 ) and light is fully absorbed in a thin film only a few microns thick.The polycrystalline thin films can be deposited on glass at high deposition rates in a highly optimized manufacturing process.As a result, the cost of thin film CdTe modules is competitive with crystalline silicon panels.The cost of solar electricity generated from thin film PV technology is already as low as 2.8 US cents per kW.hr at utility scale. [2]Further increases in module efficiency will lower the cost of solar electricity.The further development of thin film CdTe PV technology will contribute to achieving the net zero carbon emission target by 2050 to limit the global temperature increase to 1.5 °C. [3]ignificant improvements have been made to increase the conversion efficiency of thin film CdTe-based solar cells.Values achieved for the short-circuit current density (J sc ) are now within ≈95% of the Shockley-Queisser limit.Cadmium sulfide (CdS) has traditionally been used as the front n-type buffer layer in CdTe solar cells.Wu reported 16.5% efficient CdTe solar cells using chemical bath deposited (CBD) CdS buffer layers. [4]However, CdS forms a slight cliff-like conduction band alignment to CdTe and has a bandgap energy of 2.4 eV. [1]This small bandgap energy causes parasitic absorption of short wavelength photons, which are mostly absorbed in the CdS region, and photogenerated carriers cannot be effectively collected here due to nanosized CdS grains.To reduce the parasitic absorption, Wu et al. replaced the CBD CdS with radio frequency (RF) sputtered oxygenated CdS (CdS:O) to achieve 16.7% conversion efficiency. [1,5]he sputtered amorphous CdS:O has a higher bandgap energy (2.5−3.1 eV) than the CBD polycrystalline CdS [6] and allows a thinner buffer layer to be used in the device structure to prevent interdiffusion of Te to form CdS x Te 1−x during the high temperature cadmium chloride (CdCl 2 ) activation process. [1]However, although the oxygenated CdS resulted in increased photocurrent, the bandgap still caused some parasitic absorption.
Further increases in photocurrent have been achieved by adding a p-type CdSeTe alloy layer at the front interface with a layer of CdTe at the back.The selenium (Se) is introduced by depositing either CdSe or a CdSeTe alloy and then causing grading of the Se by interdiffusion into the CdTe layer during the high temperature CdCl 2 activation process.This lowers the band gap at the front of the device, thereby expanding the wavelength range of the CdSeTe/CdTe solar cell from 850 to 900 nm.In addition, using cathodoluminescence, the presence of Se has been shown to passivate defects both in CdTe grain interiors and grain boundaries. [7,8]ore recently, CdS and CdS:O buffers have been completely replaced with wide bandgap oxides such as magnesium (Mg) alloyed zinc oxide (MZO) or tin oxide (SnO 2 ). [1,9,10]MZO has a higher bandgap energy above 3 eV, enabling better short wavelength light transmission. [11]Magnesium alloying increases the bandgap energy of zinc oxide (ZnO) by tuning the conduction band minimum, [12] therefore allowing adjustment of the conduction band offset (CBO) between MZO and CdTe. [11]Munshi et al. have demonstrated over 18% efficient copper (Cu) doped CdTe solar cells using MZO buffer layers. [10]Incorporating Se alloying in CdTe with the MZO buffer layer, Munshi et al. increased J sc from 26 to over 28 mA cm −2 [13] and Shimpi et al. demonstrated 20.14% efficient Cu-doped CdSeTe/CdTe PV devices with an anti-reflection coating. [14]Although it is known that MZO works well in devices, MZO has been observed to degrade when exposed to atmospheric conditions. [15]Magnesium oxide (MgO) reacts with water from ambient air to form magnesium hydroxide (Mg(OH) 2 ). [15]This suggests that MgO alloyed films are not sufficiently environmentally stable.Devices incorporating MZO buffer layers often exhibit an 'S' shape behavior in the current density-voltage (J-V) characteristics. [16]For example, the S-kink has been observed to form after exposing the MZO-based devices to atmospheric conditions for 30 days. [15]Although the 'S' shaped behavior can be removed after preconditioning with light soaking, the recovery typically only remains for about three days. [17]This instability is a severe drawback of using MZO in a device.It is vital to explore alternative materials that can replace existing buffer layers to further improve device efficiency while ensuring long-term stability.
The open-circuit voltage deficit (E g /q -V oc ) is the key hurdle to achieving conversion efficiencies above 25% for polycrystalline CdSeTe/CdTe devices. [1]The highest open-circuit voltage (V oc ) only accounts for about 80% of the Shockley-Queisser limit. [1]ssuming a bandgap energy of 1.38 eV for the previous record 22.1% CdSeTe/CdTe device, the V oc deficit is 503 mV, [1] which is much larger than the voltage deficit for silicon, GaAs, CIGSe, and perovskite solar cells. [18]Hence, further increasing V oc has become the focus of present thin film CdTe research.One of the strategies used to reduce the V oc deficit is to increase the carrier concentration in the CdSeTe/CdTe absorber without compromising carrier lifetime.Copper has been used for decades as a dopant in CdTe and CdSeTe/CdTe absorbers.However, its use limits the hole density to the order of 10 14 cm −3 and diffusion of Cu in the device can lead to long term degradation.Group V elements, such as arsenic (As), have been used to dope the CdTe and Cd-SeTe/CdTe layers to achieve high acceptor densities exceeding 10 16 cm −3 . [19,20]Recently, researchers have used As to increase the hole density to the order of 10 16 cm −3 and reported a new record efficiency of 22.3%. [5,21]Furthermore, the devices have much improved long-term stability. [21,22]Therefore, the challenge has been to discover a stable wide bandgap material to act as a buffer layer that is compatible with an As-doped CdSeTe/CdTe absorber.
To search for a suitable material for the front interface buffer to couple with the As-doped CdSeTe/CdTe absorber, we have reinvestigated the use of an intrinsic ZnO front buffer layer.Intrinsic ZnO is highly resistive with an exceptionally low carrier concentration.However, the carrier concentration can be increased to higher levels by introducing alloying or dopant atoms.In this study, we first used intrinsic ZnO to establish a baseline.We achieved a 21.44% efficient and stable As-doped CdSeTe/CdTe device with this highly resistive buffer layer.Figure 1 shows the device structure, which achieved this remarkable efficiency.The device also incorporated a multilayer anti-reflection (MAR) coating that decreased the reflection by 3.38% absolute. [23]The discovery that a high resistance buffer layer works so well opens up new potential pathways to achieve highly efficient As-doped Cd-SeTe/CdTe solar cells.

Electrical Measurements
The device performance parameters obtained from the J-V measurements are presented as box plots as a function of ZnO buffer layer thickness in Figure 2. Note that none of the results presented in Figure 2 are from devices with an anti-reflection coating.Figure 2a-d shows that the highest efficiency of 21.23%, V oc of 883 mV, J sc of 30.04 mA cm −2 and fill factor (FF) of 80.73% was achieved using a 50 nm thick ZnO layer.The device with the 50 nm thick ZnO buffer layer shows the highest average V oc and J sc .There is a clear trend for device efficiency to increase using thinner buffer layers.The exception to the trend at 30 nm may be caused by problems of non-uniform coverage of the relatively rough fluorine doped tin oxide (SnO 2 :F) beneath.Increasing the thickness of the buffer layer appears to reduce the J sc but does not dramatically affect the FF.
The J-V characteristics of the best performing ZnO/CdSeTe/CdTe cell with a 50 nm thick ZnO buffer layer are presented in Figure 3a.In this case, an MAR coating was applied prior to device fabrication.This ZnO/CdSeTe/CdTe device shows excellent performance, with a cell efficiency of 21.44%, V oc of 875.5 mV, J sc of 30.43 mA cm −2 and FF of 80.48%.The corresponding external quantum efficiency (EQE) spectrum is presented in Figure 3b.This shows the advantage of the wide bandgap of the ZnO at short wavelengths and the effect of the CdSeTe bandgap grading extending the wavelengths absorbed to 900 nm.Using Tauc plots, the bandgap of ZnO was determined to be 3.2 eV.Using the first derivative of the EQE as a function of wavelength, [24] the bandgap of the absorber is calculated to be 1.41 eV.In this case, an MAR coating was applied prior to device fabrication.This ZnO/CdSeTe/CdTe device shows excellent performance, with a cell efficiency of 21.44%, V oc of 875.5 mV, J sc of 30.43 mA cm −2 and FF of 80.48%.The corresponding external quantum efficiency (EQE) spectrum is presented in Figure 3b.This shows the advantage of the wide bandgap of the ZnO at short wavelengths and the effect of the CdSeTe bandgap grading extending the wavelengths absorbed to 900 nm.Using Tauc plots, the bandgap of ZnO was determined to be 3.2 eV.Using the first derivative of the EQE as a function of wavelength, [24] the bandgap of the absorber is calculated to be 1.41 eV.
Capacitance-voltage (C-V) measurements were used to plot the hole density versus the depletion width as shown in Figure 3c.The hole density is ≈2.1x10 16 cm −3 , extracted at zero-voltage bias.The dominant recombination mechanisms in the device can be studied using J-V characteristics measured as a function of temperature (JVT).The extrapolation of V oc to 0 K gives the activation energy (E a ) of the recombination mechanism. [25]Figure 3d shows the V oc as a function of temperature, where the V oc at 0 K is obtained using a linear fit.The E a is 1.36 eV, which is lower than the absorber bandgap.This suggests that the interface recombination is limiting the device performance. [26]Following environmental tests, the J-V measurements showed that no 'S' shape and/or roll-over behavior occurred.

Materials Characterization
A bright-field scanning transmission electron microscopy (STEM) image of a device cross-section is presented in Figure 4a.
The image shows uniform and continuous coverage of the 50 nm thick ZnO on the relatively rough SnO 2 :F (FTO) layer.A highresolution transmission electron microscopy (HRTEM) image of the FTO/ZnO/CdSeTe front interface is presented in Figure 5.
The image shows the high-quality interface and confirms the nanocrystalline structure of the ZnO layer.This is due to the ZnO deposition being performed at room temperature.Furthermore, no interface voiding is observed.STEM Energy-Dispersive X-ray  is not present at the ZnO/CdSeTe interface.Chlorine is usually observed in cross-sections of the front interface of high efficiency devices. [27]It travels down grain boundaries and accumulates at the junction where it is known to passivate defects at the interface.It is clear that Cl was introduced in the activation process in this device because it is present in adjacent grain boundaries and a speck of the element is visible at the ZnO/FTO interface; possibly in a small void.The Cl map (within EDX detection limits) does not appear to show Cl diffusing between ZnO grains, unlike in the case of MZO as reported by Munshi et al. [28] The unusual omission of Cl at the junction suggests that the microstructure of the ZnO/CdSeTe interface is of high quality.Chlorine segregation is not necessary or possible in this exceptionally good interface.

Carrier Concentration From Hall Effect Measurements
In high performance devices incorporating SnO 2 as the buffer layer, the carrier concentration has been of the order 10 18 -10 19 cm −3 as determined by Hall effect measurements on SnO 2 deposited on glass.Although it has not been possible to measure carrier concentrations of as-deposited MZO, it has been thought that doping may occur in the MZO layer, due to the formation of oxygen vacancies during the CdCl 2 activation treatment. [17]Device modeling suggests that higher values in the n-type buffer layer than the p-type absorber is a condition for high device efficiency. [29]We have used a high-sensitivity parallel dipole line (PDL) Hall effect system [30] to measure the carrier concentration of very thin (50 nm) and highly resistive ZnO films.The PDL Hall effect system is capable of measuring very low carrier concen-trations on the order of 10 12 cm −3 .However, we were unable to obtain a carrier concentration measurement even with this ultrasensitive technique.Therefore, we can assume that as-deposited ZnO has a carrier concentration certainly below 10 12 cm −3 .There is no evidence in the microstructural analysis to suggest depletion of oxygen in the ZnO film by diffusion during the high temperature process steps.As a result, the ZnO film remains highly resistive in the device even after processing.This suggests that the device operates in a different way to those using a SnO 2 or even an MZO buffer layer.This is intriguing because it opens up a potential new avenue for device structure and also focuses more attention on the role of the n-type FTO as the transparent conductor.

Device Modeling
SCAPS is used to model the device to understand the role of the intrinsic ZnO layer.Coupled with the FTO transparent conductor and absorber, the ZnO layer forms a device structure of n-type FTO/ZnO/p-type As-doped CdSeTe/CdTe absorber.From Hall effect measurements, we assume a value of 1x10 11 cm −3 for the carrier concentration of the ZnO.So, the ZnO acts as a high resistivity transparent (HRT) layer.Using these assumptions in the device model, the simulated device performance is consistent with the experimental measurements, as shown in Figure 6a.
Ablekim et al. have simulated the MZO/CdTe device structure and suggested that a highly doped MZO emitter is needed for highly efficient CdTe solar cells. [31]The MZO functions differently to the ZnO HRT layer.Both device configurations can achieve efficiencies exceeding 20%. [14]Chlorine was not observed at the ZnO/CdSeTe interface.This suggests that the ZnO/CdSeTe is well passivated.However, Cl has been observed to decorate the MZO/CdSeTe interface. [28]igure 6b shows the band diagram of the simulated device at thermal equilibrium for an FTO carrier concentration of 1×10 20 cm −3 .The simulation uses a CBO of +0.1 eV (spike).Although the CBO is not in the optimal range of +0.3 to +0.4 eV, Song et al. have demonstrated that a small CBO of +0.1 eV can help maintain good device efficiency. [29]In the future, we will measure the accurate CBO using ultraviolet photoelectron spectroscopy.The magnified conduction band structure between the CdSeTe/CdTe and FTO for various FTO carrier concentrations is presented in Figure 6c.
When the FTO carrier concentration is the same as the absorber, the space charge region of the p-n junction is formed across the FTO, ZnO, and CdSeTe layers.However, because the FTO carrier concentration is orders of magnitude greater than that of the absorber, the p-n junction becomes abrupt and the space charge region is shifted into the absorber.This reduces the bulk recombination and improves carrier collection efficiency in the CdSeTe/CdTe absorber.The increasing carrier concentrations in FTO also induces stronger band bending of the absorber, therefore repelling holes in the absorber from the ZnO/CdSeTe interface and reducing interface recombination.

Conclusion
The incorporation of a 50 nm thick ZnO buffer layer in As-doped CdSeTe/CdTe solar cells has led to an efficiency of 21.44% and 21.23% with and without an anti-reflection coating, respectively.By re-investigating the use of an intrinsic ZnO buffer layer, we find that ZnO can be used with the As-doped CdSeTe/CdTe absorber to achieve highly efficient and stable devices.We have investigated the effect of changing the thickness of the ZnO buffer in the range 30-200 nm and this has shown that the optimal ZnO thickness is 50 nm.Sensitive Hall effect measurements on as-deposited ZnO confirm that it is highly resistive and the carrier concentration is below 10 12 cm −3 .The extrapolated V oc at 0 K suggests that interface recombination remains a limiting factor for device performance.Detailed microstructural analysis using cross-sectional TEM and EDX shows that interdiffusion does not occur between the ZnO buffer and the CdSeTe absorber layer or with the transparent conductor (FTO) below it.This evidence suggests that the ZnO remains unchanged during device processing and that oxygen vacancies are not created.Thus, the ZnO layer remains highly resistive.In addition, it is usual to observe the presence of Cl at the buffer/absorber interface, where Cl acts to pacify the high density of defects present.Although Cl is observed in the adjacent absorber grain boundaries, Cl is not detected above the EDX detection limit at the ZnO/CdSeTe interface.High resolution TEM shows a very tight interface boundary and this together with the absence of Cl suggests that the ZnO/CdSeTe interface is of high quality and lacks dangling bonds.The ZnO acts in a different way to other buffer layers previously used such as SnO 2 because the carrier concentration is up to eight orders of magnitude lower.We have presented a model that may explain the device efficiency which indicates that the space charge region is moved into the CdSeTe absorber, further emphasizing the probability of reduced interface recombination.However, further detailed testing and analysis is required to fully understand why this type of device works so well.The intrinsic ZnO film was deposited at room temperature.There is potentially room for improvement with further optimization, such as increasing substrate temperature during the RF sputtering process.The exceptional performance was obtained on initial devices and not after longstanding and optimized process development.As a result, there is exciting potential for further improvement.

Experimental Section
Materials and Device Synthesis: The substrate used was commercial soda-lime glass with an FTO coating, provided by NSG-Pilkington.The substrate size was 5 × 5 cm and was 2.65 mm thick.Compressed air was used to remove particles from the surface of the glass substrates.This was followed by wiping the substrates with Kimtech wipes and 99.5+% pure isopropanol (IPA) to remove visible surface contaminants.Compressed air was used again to dry the substrates and remove any particles.Ultrasonic cleaning was used to further clean the substrates in three 15-min cycles, at a temperature of 45 °C.The first cycle included deionized (DI) water with multipurpose detergent.The second and third cycles used >95% pure acetone and 99.5+% pure IPA, respectively.The glass substrates were rinsed using DI water between the first and second cycle.After the third cycle, the substrates were stored in a beaker filled with IPA.
One of the glass substrates had a durable multilayer anti-reflection (MAR) coating [32,33] deposited before the ZnO deposition.The MAR coating, comprising six layers with alternating SiO 2 /ZrO 2 , was deposited on the uncoated side of the glass substrate prior to device fabrication using reactive pulsed-DC magnetron sputtering.A "MyCoat" deposition system supplied by Vision Ease, Inc was used, with six-inch diameter Si and Zr metal targets supplied by Plasmaterials, Inc.The substrate carrier was set to rotate at 120 rpm during deposition, and metal oxides were formed as the deposited material passed through a physically separated oxygen plasma.The MAR coating had the following structure: SiO 2 (91nm)/ZrO 2 (28nm)/SiO 2 (11nm)/ZrO 2 (94nm)/SiO 2 (22nm)/ZrO 2 (22nm)/Glass. [23]The deposition process began with an oxygen/argon plasma clean for 30 s to activate the surface and promote adhesion.The SiO 2 layers were deposited in 61.54% argon and 38.46% oxygen.The power density was 8.22 W cm −2 , with a pulse frequency of 150 kHz and a reverse time of 1.5 μs.The ZrO 2 layers were deposited in 50% argon and 50% oxygen.The power density was 7.99 W cm −2 , with a pulse frequency of 150 kHz and reverse time of 2.5 μs.All films were deposited at room temperature at a sputtering pressure of 0.225 mTorr.Deposition rates for SiO 2 and ZrO 2 layers were 0.5 and 0.8 nm s −1 , respectively, leading to a total process time, from loading to unloading, of just under 20 min for the 268 nm thick coating.
A magnetron sputtering system (AJA International, Inc.) was used to deposit the ZnO films using RF sputtering.The 0613 GTC (AJA International, Inc.) power supply was used and an AIT-600-06R tuner (T&C Power Conversion, Inc.) was used for RF matching.The ZnO (99.9%) target was 4 inches in diameter and was supplied by Plasmaterials, Inc.After loading the substrates into the sputtering system, the FTO surface was cleaned and activated using a 5-min plasma clean.The plasma was generated using a power of 80 W, the working gas pressure was set to 5 mTorr with 20% oxygen and 80% argon, and the temperature was 22 °C.This was followed by the ZnO deposition on the FTO coated glass substrate using a power density of 1.85 W cm −2 , at a temperature of 22 °C.The substrates were set to rotate at 10 rpm, the target tilt angle was 9°and the distance between the target and substrates was 18.4 cm.The working gas pressure was set to 1 mTorr with 1% oxygen in argon.The base pressure in the chamber was between 2.0 × 10 −4 and 4.0 × 10 −4 mTorr before each deposition.The ZnO deposition rate was ≈2.0 nm min −1 and the ZnO film thickness was varied from 30 to 200 nm.
The 3-4 μm thick CdSeTe/CdTe absorber was deposited on the ZnO buffer layer using a vapor-transport deposition (VTD) process at First Solar. [21]The CdSeTe/CdTe absorber was doped with arsenic.Following the absorber deposition, the samples were activated with an anneal in a CdCl 2 -vapor environment between 400-500 °C. [21]This was followed by a ZnTe and metal back-contact deposition. [34]Laser scribing was used to define the cells, which had an area of 0.445 cm 2 .
Characterization: The illuminated J-V curve presented in Figure 3a was measured at room temperature using a four-wire configuration under one Sun (AM 1.5G) with a class AAA Oriel Sol1A solar simulator.The Agilent E4980A LCR meter was used for the C-V measurements at a frequency of 40 kHz. [34]The EQE measurements were calibrated using a Si reference cell with a known (NIST-traceable) spectrum. [34]J-V characteristics were measured as a function of temperature (JVT).The measurements were taken over a temperature range of −70 −85 °C.From the JVT measurements, the V oc was plotted as a function of temperature.The V oc at 0 K was extrapolated by applying a linear fit to the high-temperature data (315-355 K).
The sample foil for scanning transmission electron microscopy (STEM) analysis was prepared using an FEI FIB dual-beam system, employing a standard in situ lift out method. [35]The high-resolution transmission electron microscopy (HRTEM) and STEM imaging process was performed using an FEI Tecnai F20 S/TEM, which was equipped with Gatan bright and dark-field STEM detectors, a Fischione high-angle annular dark field STEM detector and an Oxford Instruments X-Max 80 mm 2 windowless EDX spectrometer.The imaging conditions were set at 200 kV, with a camera length of 100 mm and a condenser aperture size of 70 μm. [7]CAPS Simulations: SCAPS is a 1D simulation software and was developed at the University of Gent.[36] The device structure of n-type FTO/ZnO/p-type As-doped CdSeTe/CdTe absorber was modeled in this work.The material properties had been extracted from the experimental results and from literature sources.[36] Linear graded carrier concentration and bandgap energy were implemented in the p-type CdSeTe/CdTe absorber (i.e., from 3× 10 16 cm −3 in CdTe to 1× 10 16 cm −3 in CdSeTe and from 1.50 eV in CdTe to 1.41 eV in CdSeTe, respectively).The carrier lifetime was 10 ns in the CdSeTe/CdTe absorber. The acceptor" type defects at the ZnO/CdSeTe interface were used and the defect density was 1× 10 9 cm −2 , corresponding to a surface recombination velocity of 1× 10 4 cm s −1 .The CBO between ZnO and CdSeTe was set to +0.1 eV (spike).The carrier concentrations in the n-type FTO and ZnO layers were 1× 10 20 and 1× 10 11 cm −3 , respectively.
Statistical Analysis: The boxes in Figure 2 were determined by the 25th (Q1) and 75th (Q3) percentiles, where their difference formed the interquartile range (IQR).The minimum and maximum points were given by Q1-1.5IQR and Q3+1.5IQR, respectively.Outliers were defined by the data points, which were more than 1.5IQR above Q3 or below Q1.The mean and median were also calculated.Each box had a sample size of 12. Origin 2020 (OriginLab) was used to perform all statistical analysis and plotting/graphing.

Figure 1 .
Figure 1.The device structure incorporates a high resistivity ZnO buffer layer used to obtain a cell with 21.44% conversion efficiency (not to scale).

Figure 2 .
Figure 2. Device performance for varying buffer layer thicknesses, each plot consists of five devices, which have 12 cells each.

Figure 3 .
Figure 3. Characteristics of the As-doped ZnO/CdSeTe/CdTe device with a cell efficiency of 21.44%.

Figure 4 .
Figure 4. Cross-sections of the front interface showing the FTO/ZnO/CdSeTe layers.

Figure 5 .
Figure 5. HRTEM image showing the high-quality interfaces between the FTO/ZnO and ZnO/CdSeTe.