NbTe4 Phase‐Change Material: Breaking the Phase‐Change Temperature Balance in 2D Van der Waals Transition‐Metal Binary Chalcogenide

2D van der Waals (vdW) transition metal di‐chalcogenides (TMDs) have garnered significant attention in the nonvolatile memory field for their tunable electrical properties, scalability, and potential for phase engineering. However, their complex switching mechanism and complicated fabrication methods pose challenges for mass production. Sputtering is a promising technique for large‐area 2D vdW TMD fabrication, but the high melting point (typically Tm > 1000 °C) of TMDs requires elevated temperatures for good crystallinity. This study focuses on the low‐Tm 2D vdW TM tetra‐chalcogenides and identifies NbTe4 as a promising candidate with an ultra‐low Tm of around 447 °C (onset temperature). As‐grown NbTe4 forms an amorphous phase upon deposition that can be crystallized by annealing at temperatures above 272 °C. The simultaneous presence of a low Tm and a high crystallization temperature Tc can resolve important issues facing current phase‐change memory compounds, such as high Reset energies and poor thermal stability of the amorphous phase. Therefore, NbTe4 holds great promise as a potential solution to these issues.


Introduction
2D van der Waals (vdW) materials, particularly transition metal di-chalcogenides (TMDs), have drawn significant attention in electronics and optoelectronics due to their 2D confinement  [11,15,[29][30][31] the T c and T m values of NbTe 4 were defined by the onset temperature of crystallization and melting peaks in this study; B) XRD curves of NbTe 4 thin films annealed at various temperatures; C) cross-sectional TEM image of 350 °C annealed NbTe 4 thin film; D) zoomed in image of the white-box area in (C); E) the FFT pattern taken from the area of (D).
structure (2H d ) and orthorhombic T d conducting phases in a vertical MoTe 2 -based ReRAM device. [12]Datye et al. pointed out that a conductive filament from defect generation or Te migration from the initial forming process also contributes to localized phase-change in MoTe 2 . [13]Most recently, Yang et al. demonstrated that a phase transition in MoTe 2 can be induced by heating in a PCRAM device as characterized by temperature dependent Raman. [10]Therefore, the versatile polymorphic phase-change ability of TMDs, especially MoTe 2 to function as switching layer in the new generation of NVMs.However, the underlying switching mechanism is still controversial, as it is not clear whether it is driven by a d-orbital population redistribution induced by an electrical field or just by Joule heating.In addition, experiments have typically been carried out using layered nano flakes created by mechanical or chemical exfoliation, a process not scalable to mass production. [12,14]puttering is a mature physical vapor deposition process for the growth of thin films, which is already in wide use in the semiconductor industry.Recently, this technique has been applied for the large-area growth of TMDs such as MoTe 2 and MoS 2 . [11,15,16]Interestingly, as-deposited sputtered TMDs are typically amorphous; the layered crystalline structure can be formed by post-annealing at elevated temperature.Such an amorphousto-crystalline phase transition is often observed for chalcogenidebased phase-change materials (PCMs) such as Ge 2 Sb 2 Te 5 (GST) used in rewritable optical discs and PCRAM devices.The key distinguishing feature of 2D TM-chalcogenides from conventional PCMs is their higher melting point (T m ) (>1000 °C), which can be attributed to the high T m of transition metals such as Mo and W as compared to Ge and Sb. [17](Figure 1A) Moreover, the crystallization temperature (T c ) of these materials is also much higher than conventional PCMs, owing to the strong bonding between the TMs and chalcogen atoms, for example, MoTe 2 and MoS 2 have T c values of over 400 and 800 °C, respectively. [11,16]Figure 1A) Such high T m and T c values lead to compatibility issues with CMOS (complementary metal oxide semiconductor) fabrication processes as well as operating conditions realized in a GST-based PCRAM devices.[18,19] In this study, we demonstrate that chalcogen-rich 2D TMchalcogenides, such as 2D tetra-chalcogenides (TMT) or MX 4 , can exhibit moderate phase-change temperatures (T c and T m ) as a consequence of the reduction in transition metal content compared with TMDs (MX 2 ) that are suitable for PCRAM based on phase-change between amorphous and crystalline phases.In light of these considerations, the layered TM-chalcogenide NbTe 4 is the focus of the current study as it shows a low liquidus temperature based on the Nb-Te binary phase diagram.[20] NbTe 4 thin films grown by radio frequency sputtering at room temperature were found to be amorphous similar to typical PCMs and sputter-grown MoTe 2 .The resulting NbTe 4 thin film could be crystallized by post-annealing with a crystallization temperature be around 272 °C as verified by differential scanning calorimetry (DSC) measurements.The onset temperature of melting point was also confirmed by DSC to be 447 °C, a value much lower than that of most TMDs and even PCMs.(inset DSC curve of Figure 1A) The higher T c and ultra-low T m of NbTe 4 compared to traditional PCMs, such as GST (T c : 160 °C, T m : 630 °C), [21] make it an excellent solution to some of the issues faced by current PCRAM compounds, such as poor thermal stability and high Reset energies.These promising properties motivated us to evaluate the switching performance of NbTe 4 -based PCRAM, which showed a significant reduction in operation energy compared to comparable GST devices.Additionally, the estimated 10-year data retention temperature was found to be as high as 135 °C. The comned characteristics of NbTe 4 , including its competitive switching speed of ≈30 ns, make it an ideal candidate for the new generation of PCM that hopefully move past the bottlenecks facing the existing generation of PCMs.

NbTe 4 Thin Film Characterization
As-deposited sputtered NbTe 4 films were confirmed to be an amorphous phase by transmission electron microscopy (TEM).(Figure S1, Supporting Information) The surface of NbTe 4 thin film was smooth and the selected area diffraction pattern seen in the inset of Figure S1, Supporting Information exhibited a typical halo pattern, indicating that the film was an amorphous phase.The Te and Nb compositions of the 1 μm-thick film were confirmed by scanning electron microscope-energy dispersive X-ray spectrometry (SEM-EDX) to be (82.1 ± 0.5) and (17.9 ± 0.5) at%, respectively.It is worth noting from the DSC curve in the inset of Figure 1A that the NbTe 4 film shows incongruent melting starting from the formation of a Te liquid phase [22] at around 445 °C and then reaching the liquidus temperature of around 500 °C.This incongruent melting behavior is similar to the conventional PCMs such as GST. [23]The thermal stability of the amorphous phase is an important factor in data retention in the PCRAM application.Thus, the thermal stability of the as-deposited film was also evaluated by DSC measurements at various heating rates based on the Ozawa method. [24]he NbTe 4 was found to exhibit better data-retention properties in that the amorphous phase is expected to be stable at 135 °C for 10 years; a retention of the NbTe 4 is much better than that of GST (85 °C) measured using the same method. [25](Figure S2, Supporting Information) To understand the crystallization process of the as-deposited NbTe 4 thin film, X-ray diffraction (XRD) measurements were performed for NbTe 4 thin films annealed at various temperatures up to 350 °C, as can be seen in Figure 1B.No distinct diffraction peak was visible in the as-deposited NbTe 4 film, consistent with the TEM result.On the other hand, clear Bragg reflection peaks corresponding to a layered tetragonal NbTe 4 phase appeared for annealing temperatures over 270 °C, indicating the onset of crystallization.The intensity of the XRD peaks was found to increase with annealing temperature, suggesting the continuous growth of crystalline grains.The NbTe 4 phase consists of a layered structure with vdWs gap between Te layers along b-axis. [26]Only peaks from the 0l0 family were observed suggesting the film was strongly b-axis oriented. [27]A cross-section TEM image of a 350 °C annealed NbTe 4 thin film is shown in Figure 1C.The lateral grain size of the film was found to exceed 400 nm, and a clear layered structure with lateral vdW gaps to the substrate can be observed in Figure 1D, in good agreement with the XRD results indicating 0l0-oriented peaks.A corresponding fast Fourier transformation (FFT) pattern taken from the area shown in Figure 1D shows spots along the out-of-plane direction, and the location of these spots corresponds to the (0l0) lattice spacing.(Figure 1E) The TEM results provide strong evidence for the successful deposition of a large-area 2D layered NbTe 4 film.It is noteworthy that there is a distortion within each layer as indicated by the larger angle of (002) plane than 90°compared with the reported tetragonal NbTe 4 phase. [28]The crystal structure of the 2D vdW NbTe 4 will be the subject of a future study.

Switching Performance of NbTe 4
The high crystallization temperature of NbTe 4 and its low melting point are anticipated to lead to better thermal stability and a large reduction in Reset energy compared to GST motivating an investigation of the switching properties of a NbTe 4 -based memory cell.The variation of the sheet resistance of the NbTe 4 thin film upon phase-change is shown in Figure 2A.The as-deposited amorphous phase exhibits a much lower resistance (10 4 Ω) compared with GST (10 8 Ω) measured under the same conditions.(Figure S3, Supporting Information) For temperatures over the T c value determined by DSC and XRD measurements, the resistance was found to increase with continuing crystallization, a trend opposite that of GST.(Figure S3, Supporting Information) Consequently, after cooling, the resistance of the crystalline phase at room temperature becomes larger than that of amorphous phase and with a resistance ratio of more than two orders of magnitude.This unique inverse resistive property change has also been found in several other transition metal-included PCMs such as Cr 2 Ge 2 Te 6 and FeTe. [32,33]It is noteworthy that both phases display semiconducting behavior with a negative temperature coefficient of resistance, in stark contrast to the insulating amorphous and metallic crystalline phases of GST. [34]The large resistance ratio of around 10 2 should make it possible to use NbTe 4 as a switching layer in a PCRAM device.Thus, the switching behavior of NbTe 4 in a device structure was investigated.Figure 2B shows a schematic cross-section of a T-shape memory device.The cuboid shaped heater in the device was fabricated from TiN.The contact area of the heater was 45 × 45 nm 2 .The as-deposited amorphous NbTe 4 layer was in the low resistance state.Figure S4, Supporting Information shows the experimental I-V curve obtained by a current pulse (500 μs).When the applied voltage exceeded the threshold voltage (0.52 V), the current dropped sharply and the resistance changed from 10 4 Ω to a stable high resistance 10 6 Ω state, indicating a phase-change from the amorphous to crystalline phase.Figure 2C shows the typical R-V characteristics of the NbTe 4 -based PCRAM cell.30, 50, and 100 ns pulse widths were used for the switching operation.For all pulse widths, when a small voltage was applied, the Joule heating energy generated was insufficient to induce a phase-change and the resistance of the cell remained at the low resistance level.As the applied voltage was further increased, the resistance rapidly increased to that of the high resistance crystalline state at the socalled Set voltage.When yet larger voltage pulses were applied, the cell changed to the low resistance amorphous Reset state for the voltages 1.3, 1.5, and 2.1 V for pulse widths of 30, 50, and 100 ns, respectively.Both the Set and Reset voltage were found to decrease with increasing pulse width.Additionally, a more than 2order magnitude resistance ratio can be clearly seen between the Reset and Set states for all pulse widths, which implies a 30 ns switching pulse is sufficient for crystallization to occur during the Set process.The long-term reliability of the Reset and Set states was evaluated by measuring the resistance drift coefficient (), as shown in Figure S5, Supporting Information.Both the Reset and Set states exhibited an ultra-low  of 0.001 and 0.005, respectively, in comparison to the values of 0.11 and 0.01 observed in GST devices. [35]Furthermore, an endurance measurement was conducted on NbTe 4 , revealing the device could be cycled more than 100 times (Figure S6A, Supporting Information).It is worth noting that the limited number of switching cycles observed at the present stage can potentially be attributed to the narrow temperature gap (Figure S6B For comparison purposes, a GST-based device was also fabricated and evaluated.Figure 2D shows the R-V curves of the GST device measured for 50, 100, and 200 ns pulse widths.The as-fabricated GST memory cell was in the high-resistance amorphous state and underwent a Set operation to the low-resistance crystalline state at around 0.8 V for all pulse widths and was found to undergo a Reset operation back to the high-resistance amor-phous state for 2.0, 3.8, and 7.0 V for 50, 100, and 200 ns width pulses, respectively.It was difficult to switch the GST device for pulse width less than 50 ns.The crystallization speed of GST is known to be fast, but these results indicate that the crystallization speed of amorphous NbTe 4 is also fast even though the local structures are quite different between amorphous and crystalline phases as discussed later.Based on the above results, the operation energies were quantitatively compared using the following equation: where V Set and V Reset are the pulse voltages for the Set and Reset processes,  Set and  Reset are the resistances for the Set and Reset states, respectively, and t is the pulse width.It is noteworthy that in practice the pulse voltage was slightly larger than the applied pulse voltage due to the intrinsic impedance (50 ohm) of the semiconductor analyzer (B1500A, Keysight).Consequently, all voltage values used for the energy calculation are the voltages measured by an oscilloscope (Tektronix, TBS 1202B).It is also important to mention that the Joule heating energy calculated using the above equation is primarily used for estimation and comparison purposes.In practical scenarios, the actual transit current during Reset or Set operations is typically higher than what is calculated using V/R, which in turn leads to a higher Joule heating energy when calculated directly from the current pulses.Figure 2E compares the calculated operation energy for a pulse width of 100 ns for NbTe 4 and GST respectively.It is noteworthy that a two orders of magnitude reduction in operation energy was found for the NbTe 4 memory cell in comparison with the comparable GST device.The low operating energy of NbTe 4 mainly originates from the low Reset energy as can be clearly seen in Figure 2E due to the high resistance crystalline phase and the ultra-low melting point.It is widely recognized that the Joule heating energy in phase-change memory can be influenced by the volume of phase-change material and the contact properties between the PCM and the heater electrode, especially when scaling down memory cell size. [36]To investigate the size-dependent switching behavior and thermal consumption of NbTe 4 , we fabricated a series of plug sizes with side lengths (d) ranging from 34 to 81 nm. Figure S8A, Supporting Information illustrates the resistance change behavior of NbTe 4 devices switched by 50 ns voltage pulses.All devices initially exhibit a low-resistance amorphous phase.Under the application of higher voltage pulses, the devices underwent a Set process, transitioning to a high-resistance crystalline phase, followed by a Reset operation, switching back to the low-resistance amorphous phase.This indicates reversible resistive switching behavior.The device with the larger plug size (81 nm) shows crystallization (Set operation) at 1.3 V, followed by amorphization (Reset operation) at 1.6 V.As the plug size decreased, the Set and Reset voltages also decreased, implying a reduction in operating energy.The resistance contrast exhibits only minor changes influenced by the plug size.The trend of decreasing operation voltage with decreasing plug size is similar to that observed in conventional GST devices. [36](Figure S8B, Supporting Information) This estimation suggests that NbTe 4 has the potential to achieve significantly lower operation energy (approximately two orders lower) than GST, over a wider range of plug sizes.Table S1, Supporting Information provides a comparison of the properties of NbTe 4 along with those of typical PCM compounds that have been extensively studied recently.The comparison highlights that NbTe 4 exhibits a significant potential to emerge as a highly promising PCM, demonstrating favorable attributes such as good thermal stability, lower energy consumption, and fast switching speeds.

Local Structure of Amorphous NbTe 4
Due to the lack of ordered atomic arrangement in amorphous phase of NbTe 4 , it is difficult to characterize its structure.Thus, in this section, in order to understand the reasons behind the observed superior thermal stability and the abnormal low resistance in the amorphous NbTe 4 , the local atomic structure of amorphous NbTe 4 was investigated by extended X-ray absorption fine structure (EXAFS) as well as the ab initio molecular dynamics (AIMD) calculations.Figure 3A shows an amorphous model of NbTe 4 generated using a melt-quench molecular dynamics simulation.Different from the layered crystalline structure, the Nb and Te atoms segregate, and form clusters as indicated by the green (Nb cluster) and red circles (Te cluster), unlike conventional PCMs.It is speculated here that the presence of Nb metal clusters may give rise to a large number of carriers and lead to the low resistivity of the amorphous phase. [37,38]he EXAFS spectrum is shown in Figure S9, Supporting Information, and the Fourier transformed Te K-edge EXAFS spectrum is shown in Figure 3B.Only a single first nearest neighbor peak can be seen around 2.9 Å in the amorphous phase.The details of the bond length distributions were then calculated based on the structures shown in Figure 3A  While in the crystalline phase, Nb-Te bonding was reported to be dominant.In the case of conventional PCMs like GST, the local structure is similar in both the amorphous and crystalline phases, where Ge atoms can flip from an octahedral arrangement in the crystalline phase to a tetragonal or defective octahedral environment in the amorphous phase. [39,40]In GST, crystallization can easily occur without the breaking or reforming of many bonds.
In other words, the thermal stability of amorphous GST is usually poor due to its intrinsic bonding nature. [41]Unlike GST, the vast  [42] The role of Nb in the observed fast switching speed is intriguing and will be the subject of future investigations.
The details of the electronic structure in amorphous NbTe 4 were then investigated using hard X-ray photoelectron spectroscopy (HAXPES) and density-functional theory (DFT) calculations.The valence-band spectra of both as-deposited amorphous and 350 °C-annealed crystalline NbTe 4 measured by HAXPES are shown in Figure 4A.The electron density of state (DOS) of amorphous phase was calculated using the structure shown in Figure 3A and the calculated DOS can successfully reproduce the main features of the experimental valence-band spectrum shape qualitatively (Figure 4A).The DOS projected onto s, p, d states is shown in Figure 4B.Based on these results, the DOS in the region from 0-7 eV is mainly composed of a mixture of Te 5p and Nb 4d states, while the Te 5s states contribute to the DOS spectrum in the 9-14 eV range.Upon crystallization, a clear peak splitting can be observed in both band regions, indicating a large local bonding configuration change during phase transi-tion.Since the band of 9-14 eV mainly contains Te 5s electrons, the split of it can be possibly originated from two Te coordination environments.While in the band region from 0-7 eV, two broad peaks can be observed in the amorphous phase: the Te 5p electrons contribute more within 3-6 eV while Nb 4d contributes more within 0-3 eV, respectively.Upon crystallization, the Te 5p band splits into two peaks from 3 to 5 eV and from 5 to 7 eV, which can be possibly responsible for the formation of Te-Te bonds surrounding or connecting to Nb atoms.A similar band structure in this region was also reported for DFT simulations of NbS 4 , showing a similar quasi-1D crystal structure to NbTe 4 . [43]While the Nb 4d band in crystallization becomes sharper at 2 eV with a decrease of DOS in the region from 0 to 1 eV.Thus, the abnormally high resistance caused by the crystallization of NbTe 4 can be attributed to the reduction of Nb 4d orbitals near the Fermi level, which might be associated with the disappearance of Nb clusters by crystallization.Consistent with the experimental valence-band spectra, the DOS at the Fermi level of the amorphous phase is larger than that of the crystalline phase, suggesting a push-up of the valence band maximum, as shown in Figure 5A.
The change in band structure was further assessed by measuring the valence band maximum (VBM) and the optical bandgap.In Figure 5A, the zero of the binding energy scale represents the Fermi level (E F ).The VBM was determined by performing a linear fit of the spectra.For amorphous NbTe 4 , E F was found to be located 0.02 eV above the VBM, which increased to 0.20 eV after crystallization.The optical bandgap (E g ) of both amorphous and crystalline NbTe 4 thin films was determined using reflectance and transmittance measurements (Figure 5B,C).First, the absorption coefficient  was calculated from the following equation: [44]  = ln where d is the film thickness, T is the transmittance, and R is the reflectance.The bandgap E g can be estimated from a Tauc plot of  versus the wavelength: [45] (hv where h is the Planck constant, v is the frequency, and A is a proportional constant.The value n, which can equal 2 or 1/2, is used to determine indirect and direct transition, respectively.Figure 5D shows the quantity (hv) 1/2 as a function of hv for NbTe 4 thin films with a thickness around 100 nm, which shows an indirect transition in the Tauc plot.Extrapolation of the linear region to the abscissa yields the bandgap; here the bandgap was determined to be 0.39 eV for the amorphous phase and 0.70 eV for the crystalline phase, respectively.Figure 5E displayed a schematic diagram of the band structures for both amorphous and crystalline NbTe 4 .In both cases, E F is located below mid-gap, indicating p-type conduction.Notably, the position of E F is closer to the valence band in the amorphous phase, promoting carrier generation and resulting in a lower resistivity compared to the crystalline phase.

Conclusion
In summary, we have investigated the 2D transition metal chalcogenide PCM: NbTe 4 which offers both a low melting point (447 °C) and a high crystallization temperature (272 °C).The high thermal stability of the amorphous phase can be explained as being a consequence of large changes in the nature of bonding between the two phases based on the EXAFS results.The resistance change was found to be opposite to that of conventional PCMs with the low resistance of the amorphous phase arising from Nb 4d states near the Fermi level that originate from Nb clusters as demonstrated from HAXPES measurements and DFT calculations.The switching performance of a NbTe 4 -based memory cell was evaluated and it was found to exhibit fast-switching speeds (30 ns) and a two-orders of magnitude reduction in operation energy compared with a conventional GST memory cell.Additionally, a large Set/Reset resistance window of more than two orders of magnitude was obtained from the phase transition.This study demonstrates that the simple layered TM-chalcogenide NbTe 4 offers exceptional overall phase-change behavior.

Experimental Section
Preparation of NbTe 4 Thin Film: NbTe 4 films were deposited on SiO 2 (100 nm)/Si (725 um) or glass (Corning EAGLE XG) substrates by RF magnetron co-sputtering of Nb (99.99%) and Te (99.99%) pure targets at room temperature in an Ar gas atmosphere, where the substrate holder was rotated during deposition.The base pressure of the sputtering chamber was below 5.0 × 10 −5 Pa.The working pressure was around 1.0 Pa.The film thickness was confirmed using atomic force microscopy (AFM, VN-8000; KEYENCE).The as-deposited NbTe 4 film with a thickness of 100 nm was then annealed in an Ar atmosphere at a heating rate of 10 °C min −1 in a varied temperature range up to 350 °C and cooled down to room temperature; the temperature was simultaneously monitored with a thermocouple wafer.
Characterization of NbTe 4 Thin Film: The composition of NbTe 4 thin films was measured by SEM-EDX (JSM-6500F) with 1 μm-thick films deposited on a SiO 2 (100 nm)/Si (725 um) substrate.The cross-sectional microstructure of as-deposited NbTe 4 films was observed using TEM (JEOL, JEM-2100F) at an accelerating voltage of 200 kV.TEM samples of NbTe 4 thin films were thinned using ion milling (Gatan, PIPS).The differential scanning calorimetry (DSC, TA Instruments, Q20) measurements were measured at a heating rate of 10 °C min −1 to determine the T c and T m of the as-deposited NbTe 4 on the SiO 2 (100 nm)/Si (725 um) substrate.To obtain clear heat flow peaks, the film was deposited with a thickness of 1 μm.The crystal structures of the as-deposited and annealed NbTe 4 films were investigated by XRD (Rigaku, Ultima IV).The diffraction patterns were taken in the 2 range from 10°to 60°with Cu K radiation.The sample for XRD measurement was deposited on a glass substrate with a thickness around 100 nm.The temperature dependence of the resistance (R-T) was measured by a two-point probe method in the same annealing furnace.The electrical properties of the film were evaluated by Hall-effect measurements (Toyo Corp., ResiTest 8400).The samples for the Hall measurements were grown on glass substrates with a thickness of 100 nm.EXAFS experiments were carried out in the K-edges of the Te atoms of the NbTe 4 films in a fluoresce mode at beamline BL01B1 at SPring-8, Japan Synchrotron Radiation Research Institute (JASRI).The 311 setting of a Si double-crystal monochromator was used for the Te K-edge measurements.For the EXAFS measurements, NbTe 4 films were deposited on the quartz substrate with a 5nm-SiO 2 cap layer to avoid surface oxidation.HAXPES measurements were carried out at beamline BL46XU at the SPring-8 (JASRI) on the NbTe 4 films using a photon energy of 7.94 keV in a vacuum chamber (1.0 × 10 −5 Pa).NbTe 4 films for HAXPES measurements were deposited on a SiO 2 (100 nm)/Si (725 um) substrate with a 5nm-carbon cap layer to avoid surface oxidation.The binding energy scale was calibrated by measuring the position of the Au 4f level of a gold reference sample.Careful background subtraction following the Shirley method was applied to all HAXPES spectra to eliminate background contributions due to inelastic scattering.
First-Principles Calculations: The first-principles calculations of NbTe 4 were based on DFT with the DMol 3 package.[48][49] A double numerical basis set with polarization functions (DNP) was employed.To take into account vdWs interactions, the TS DFT-D dispersion correction was used. [50]The model of crystalline NbTe 4 contained 120 atoms, and the amorphous NbTe 4 model was obtained from the supercell of crystalline NbTe 4 via melt-quench simulation.To obtain the amorphous NbTe 4 phase, the AIMD simulation was carried out.The crystalline supercell was first heated up to 4000 K using 5 ps, and then kept at 4000 K for 20 ps to completely disorder the system.Next, the model was cooled from 4000 to 1000 K using 40 ps and was maintained at 300 K for 10 ps to obtain the quenched amorphous NbTe 4 phase.The AIMD integration time step was 5 fs per step, and a Nose-Hoover-chain thermostat was employed to control the ature.
Memory Device Fabrication: The T-shape substrate with TiN electrode plugs was used, where the TiN plug had a square shape, with a side length of 45 nm (Figure S10, Supporting Information).The T-shape substrate was first etched for 73 min by an Ar plasma to remove the surface oxidation of TiN-plug.(It was important to note that upon removing the oxidation layer, the metal plug layer undergoes thinning, resulting in a depth difference between the TiN layer and the surrounding SiO 2 layer.Consequently, the contrast observed between the TiN layer and the PCM layer in the inset of Figure 2B may potentially originate from this depth difference during the ion milling of the TEM sample.)A 100 nm-thick NbTe 4 layer was in situ deposited on top of the TiN-plug using the conventional lithography method.Then a 200 nm-thick W top electrode (TE) was deposited sequentially.
Memory Device Characterization: The read resistance for all devices was measured using a semiconductor parameter analyzer (Keysight, B1500A).To evaluate the resistive switching properties in the devices, a pulse generator (Keysight, B1525A) was used to apply short voltage pulses to the memory cells, where the amplitude and pulse width of the pulse voltage applied to the device were confirmed by an oscilloscope (Tektronix, TBS 1202B).

Figure 1 .
Figure 1.A) Comparison of T c and T m values of various 2D TM chalcogenides;[11,15,[29][30][31] the T c and T m values of NbTe 4 were defined by the onset temperature of crystallization and melting peaks in this study; B) XRD curves of NbTe 4 thin films annealed at various temperatures; C) cross-sectional TEM image of 350 °C annealed NbTe 4 thin film; D) zoomed in image of the white-box area in (C); E) the FFT pattern taken from the area of (D).

Figure 2 .
Figure 2. A) Temperature dependence of the sheet resistance of a NbTe 4 thin film for a heating rate of ≈15 °C min −1 .B) A schematic image of a crosssection of the memory device.The inset shows a cross-sectional TEM image of the device; C) resistance versus applied voltage pulse in a NbTe 4 based memory cell with fixed pulse widths of 30, 50, 100 ns.The read voltage after applying each pulse was 0.1 V; D) resistance versus applied voltage pulse for a GST-based memory cell with fixed width pulses of 50, 100, 200 ns.The read voltage after applying each pulse was 0.1 V; E) the calculated operation energy for NbTe 4 and GST-based memory cell for a pulse width of 100 ns.
, Supporting Information) T m and T c of NbTe 4 .This narrow gap may inadvertently lead to interdevice disturbances due to the proximity of the Reset and Set voltage pulses during the cyclic switching.Further improvements in the endurance performance are anticipated via precise tuning of the pulse conditions and the device structure.The resistance distribution at Set and Reset states and the operation voltage distribution for Set and Reset are collected seven devices with the same TiN plug size of 45 × 45 nm 2 as summarized in Figure S7, Supporting Information.A relatively stable programming window (10 2 ) and operating voltage can be achieved, suggesting of NbTe 4 -based memory is reliable.

Figure 3 .
Figure 3. A) The computational structure of amorphous NbTe 4 : B) Fourier transformed EXAFS spectrum of Te K-edges in amorphous NbTe 4 films; C) the bond length distribution of amorphous NbTe 4 calculated from the structural models shown in (A).
and listed in Figure 3C.In the amorphous NbTe 4 , the first nearest neighbor peak mainly arises from Nb-Nb, Nb-Te, and Te-Te bonds, and the fraction of homopolar Nb-Nb and Te-Te bonds is larger than Nb-Te bonds.

Figure 4 .
Figure 4. A) Valence-band spectra of amorphous and crystalline NbTe 4 ; B) partial density of states (PDOS in a supercell) for amorphous NbTe 4 showing the contributions of s, p and d states from each element from DFT calculations.