Environmental Effects on the Performance of Small‐Molecule Organic Thin‐Film Transistors

Electrical measurements are performed on a bottom‐gate bottom‐contact organic thin‐film transistor with 2,8‐difluoro‐5,11‐bis(triethylsilylethynyl) anthradithiophene (diF‐TES ADT) (diF‐TES ADT) as the active layer, varying the relative humidity of the environment surrounding the transistor. The results strongly indicate that water negatively impacts the electrical performance of the transistor and that the ingress of water is dynamic provided that the organic semiconductor layer is not encapsulated. It is found that the change can be reversed and the performance restored by removing the source of water. The drain current and threshold voltage of the transistor varied linearly when the relative humidity is changed from 35% to 7%, suggesting that the transistor can be used as a humidity sensor.


Introduction
Moisture in the atmosphere is one of the leading causes of degradation of the electrical performance of organic thin-film transistors (OTFTs).Material stability and operational reliability must be satisfactory in order for organic transistors to be useful in practical applications.One of the biggest challenges in selecting an organic semiconductor is the long-term stability of the material for functional circuits.3] Transistor operation was affected more significantly by humidified inert gases than by absolute oxygen, [4] and the presence of dry nitrogen with or without oxygen resulted in negligible performance loss but severe degradation occurred in wet nitrogen gas. [5]The various reports show that moisture is most likely the cause of both degradation of electrical characteristics and hysteresis in organic transistors.Reduction of the carrier mobility, [6] threshold voltage shifts [7] and appearance of a hysteresis loop [8] are all manifestations of transistor deterioration.One explanation for the significant degradation of transistor performance DOI: 10.1002/admi.202301088 with increasing relative humidity is trapping of mobile carriers in immobile electronic states arising from adsorption of water molecules by the semiconductor.[11][12] Traces of moisture have been detected by infrared spectroscopy of a thin pentacene film after exposure to a high relative humidity environment. [1]The drain current (and mobility) degradation after several days in air was more pronounced in vacuum-deposited pentacene films with small grains than in solution-processed films with much larger grain size, emphasizing that the density of grain boundaries is critical to OTFT degradation. [13]Sirringhaus et al. argued that ingress of moisture into the organic semiconductor or the presence of moisture at the interface with the SiO 2 dielectric is likely to be due to local polarization effects associated with the large dipole moment of the H 2 O molecule as opposed to a chemical reaction with the organic molecule. [14][17] Adsorption of water molecules on the active layer surface decreases the charge carrier density due to the relatively large dipole moment of water which induces hole trapping. [18,19]pon removal of the source of moisture and subjecting a device to vacuum, the effects of the environment have been shown to decrease, [20] which can also be achieved by annealing the device. [21]The reversibility of the effects of moisture points to the fact that water is not causing any permanent structural, morphological or chemical changes (such as OH − movement) in the semiconductor.
27][28] Hysteresis arose primarily due to hole trapping in shallow trap states of the organic semiconductor [29] or a dipole-induced effect due to polarization of dipole groups (inside the dielectric bulk) that can be slowly reoriented by an applied electric field. [30]When a dielectric layer was coated with a thin layer of Cytop ® , a fluoropolymer with a highly hydrophobic surface, the observed hysteresis completely vanished and the mobility improved. [27]In this report, we investigate the effects of moisture on the performance of transistors based on 2,8-difluoro-5,11bis(triethylsilylethynyl) anthradithiophene (diF-TES ADT).
DiF-TES ADT (Figure 1) is a small molecule that has excellent electrical properties with robust stability, and OTFTs can be fabricated from it via solution processing.There appears to date to have been no detailed study on the effects of the environment on diF-TES ADT, and we present our findings on the effects of moisture on the output current, carrier mobility and threshold voltage of diF-TES ADT OTFTs.We show that the output current of the transistor changes linearly with changing relative humidity within the range of the measured relative humidity values and diF-TES ADT is a viable semiconductor for moisture-sensing applications.

Effect of Moisture on Electrical Performance
A bottom-gate bottom-contact organic thin-film transistor of dimension 50 μm × 800 μm was used to investigate the humidity effects on the electrical performance of diF-TES ADT transistors.Transistor measurements were made in a humid chamber contain oxygen at ambient temperature by introducing dry nitrogen gas into an enclosed chamber initially at ambient laboratory conditions (relative humidity ≈ 35%).The relative humidity was measured before each electrical measurement using a dedicated sensor located inside the enclosure.Measurements were made at 8 min intervals while the relative humidity was changing at an approximate rate of 0.2%min −1 .This interval allowed adequate time for the transistor to equilibrate with the environment.At each humidity level the output current I D was extracted from transfer characteristic curves at different gate voltages (V G from −40 to 0 V in increments of 10 V) in the saturation regime (V D = −40 V) and the results are presented in Figure 2.
Similar trends were observed when the thin-film transistor was operating in the linear regime.Our results show that the relative humidity level directly impacts the drain current and decreasing the relative humidity increases the output current, suggesting that water is preventing mobile charges (holes) from hopping effectively between diF-TES ADT molecules.Focusing on the drain current (Figure S1, Supporting Information) when the applied bias (V G = V D ) is −40 V, the magnitude of the initial drain current at H = 35% was 3.3 μA.When H decreased to around 20%, |I d | increased to 3.9 μA (18% increase) and at the lowest value of H = 7%, |I d | was 4.3 μA.We found that |I d | correlates linearly with H within the experimental range (from 35% to 7%).The nitrogen flow rate had to be increased at H = 13% to lower the relative humidity further, causing measurement instability that limited the available experimental range.The instability could be due to the kinetic effects of degradation which were not investigated during this experiment.
Assuming that water is penetrating the semiconducting film through grain boundaries as suggested by numerous sources in the literature, we would expect the drain current to be maximum when a single crystal of diF-TES ADT is used in the OFET.A 'single-crystal' behavior can be seen by extrapolating the drain current data to zero relative humidity.If that were the case, the measured drain current would be 4.6 μA, which is at least 40% larger than what was originally measured in a normal laboratory setting.
The field-effect mobility and the threshold voltage during device saturation were extracted using the conventional FET model. [31]From the inset of Figure 3 it can be seen that the carrier mobility increases with decreasing humidity level.The hole mobility increased by around 10% for a 25% decrease in the relative humidity.Based on this result, high relative humidity causes the majority carriers (holes) to slow down during transit, which suggests that more holes are being trapped in deep localized states when the water vapor level is higher.Charges residing in deep traps do not participate in conduction.The mobility in the linear regime followed the same trend with smaller magnitudes.As can be seen in Figure 3, the threshold voltage becomes less negative as the relative humidity decreases, meaning that the accumulation channel is formed at less-negative gate voltages.The threshold voltage for OTFTs is the minimum gate voltage that has to be applied to fill charge traps (such as lattice defects,  impurities introduced during fabrication, grain boundaries or interfacial roughness) before free carriers can accumulate.More trapping centers cause the threshold voltage to become more negative and the threshold voltage becoming less negative shows that the number of traps is reduced.The relationship between the threshold voltage and the relative humidity is also linear (V T = −0.0963H− 6.46), and in an environment devoid of water molecules the threshold voltage would have a value of −6.46 V.This number would also correspond to a thin film that is similar in behavior to a single crystal provided that the major source of traps is grain boundaries.We calculated the subthreshold slope, which denotes how quickly the transistor can switch from the off to the on state and from that, we obtained the subthreshold swing (S). [31]The data are noisy (inset of Figure 4) but are consistent with a decrease in the subthreshold swing with decreasing relative humidity level.A similar decrease was obtained by other researchers. [20,32,33]The orange line serves as a guide to the eye to show that the data are consistent with a slow rise of the subthreshold swing with increasing relative humidity.Since the subthreshold swing is also an indicator of the interfacial trap density,  we expect that the trap density will increase with the relative humidity level that would indicate that water molecules are trapping mobile holes at the interface.At a relatively high relative humidity, the onset voltage is strongly negative (Figure 4) that arises from a shift in the flatband voltage owing to trapped holes.The onset voltage V on can be used to infer the kinetics of trapping in OTFTs.To a first approximation, the onset voltage is equivalent to the flatband voltage for pure small organic molecules. [34]The voltage is shifted to less-negative values at lower relative humidity that suggests that the density of trapped holes is lower.The results agree with the plots of subthreshold swing, drain current and threshold voltage versus relative humidity.
We computed the change in the density of trapped holes , where C ox is the areal capacitance of dielectric layer and q is the electronic charge) from the onset voltage [35] as a function of the relative humidity with respect to the firstmeasured data point at H = 35%.Although the equation assumes that the trap density is independent of energy, which is not usually the case, it can be a useful comparative tool.We also calculated the change in mobile charge density (ΔJ = ΔI q×Wt , where t is the thickness and W is the width of the channel).It is clear from Figure 5 that when the trapped hole density in the channel (blue markers) goes down as the relative humidity decreases, the mobile hole density (red markers) goes up.This relationship is made clearer by calculating the percentage change as a function of the relative humidity (Figure 6).The highest relative humidity is used as the reference.The percentage increase of the mobile hole density as the relative humidity decreases is roughly equivalent to the percentage decrease of the density of trapped holes, suggesting that trapped holes are being converted to mobile ones.For example, when the relative humidity was decreased from around 35% to 10%, the trapped charges decreased by around 30% while the mobile charge density increased by the very similar value of 23%.
We calculated the trap density of states using the Grünewald analysis by first determining the dependence of the drain current on the electric field due to the gate-source voltage in the linear regime and then extracting the trap density of states as a function of the energy within the bandgap. [36,37]The trap density of states, N(E), is presented in Figure S2 (Supporting Information).The shape of the trap density of states vs. energy for the case of high relative humidity is identical to that of the low relative humidity level.From N(E), we computed the shallow/deep trap densities by fitting an exponential curve to the density of states with energies lower/higher than 0.1eV; the trap densities did not change when the relative humidity was varied (Figure 7).On average, the shallow trap density was (2.0 ± 0.2) × 10 20 cm −3 and the deep trap density was (1.2 ± 0.08) × 10 20 cm −3 .It is to be noted that the trap density calculated using the Grünewald method is the bulk trap density and is several orders of magnitude higher than the trap densities calculated from the subthreshold swing or threshold voltage, which reflect the density of traps at the interface between the active layer and the interface.Even relatively large changes in the interface trap density are unlikely to be reflected in the shallow or deep trap density because the interface region has such a small volume compared to the bulk of the semiconductor.The bulk trap density remaining constant as the relative humidity changes shows that water is not reacting with the bulk of the diF-TES ADT layer or changing the structure of the film.In this section, we have shown that moisture has a detrimental effect on the performance of diF-TES ADT OTFTs.The drain current and the carrier mobility both increase when the relative humidity decreases due to a reduction in charge trapping.From the subthreshold swing, onset voltage, and threshold voltage all shifting to more-negative values, we conclude that more charge carriers are getting trapped at higher relative humidity levels.We calculated the percentage change of mobile and trapped charges charges with relative humidity and found that they are inversely proportional to each other.The mobile hole density decreases when the trapped hole density increases, demonstrating that charge trapping is responsible for the changes in device parameters that we have observed.We did not find the density of states in the bulk film to depend on the moisture level, which suggests that no chemical reactions are taking place in the semiconductor.

Hysteresis Effects
In this section, we will investigate the hysteresis effects that manifest when the gate voltage is swept forward and in reverse during measurement of the transfer characteristics while keeping other parameters constant.The root cause of hysteresis has been attributed to water molecules that penetrate the dielectric layer and induce charge trapping at the semiconductor/dielectric interface. [30]We investigated whether diF-TES ADT OTFTs are also prone to hysteresis effects by sweeping the gate voltage down from +40 V and up from −40 V in the linear regime first and then repeated the measurement in the saturation regime without any break in between to prevent detrapping of charges.We repeated the experiment at different relative humidity levels.Influence of water vapor on the dielectric layer would manifest as a change of the hysteresis with humidity (Figure 8).gives an overview of how the relative humidity affects the transfer curves.The difference ΔI D between the drain current when increasing and decreasing the gate voltage gives the degree of the hysteresis effects.From a comparison of the two graphs in Figure 8, it can be seen that the hysteresis is significantly reduced when the relative humidity is lowered.The hysteresis is almost non-existent at the lowest achievable relative humidity value of 7% showing that minimal charge trapping is observed: scanning the gate voltage in the forward direction is equivalent to scanning in the reverse direction.To quantify the hysteresis effects, the difference in the drain current values (ΔI d ) is plotted in Figure 9  V g = −40 V was omitted because the values overlap (voltage reversal).Figure 9 shows that ΔI d , which denotes the extent of hysteresis, depends strongly on H at any gate voltage.It is worthwhile to note that the curves of ΔI d versus H, at V g = −10, −20, and −30 V, all converge toward the origin of the plot meaning that the extent of hysteresis will be zero if no water molecules are in contact with the semiconductor layer.The inset shows the percentage change, which is the ratio of ΔI d to the average forward and reverse drain current (   S3 (Supporting Information).Higher magnitudes of the drain current occurred when decreasing V g from +40 to −40 V than when V g was increased.Run 1: decreasing V g in linear regime in blue; run 2: increasing V g in linear regime in light blue; run 3: decreasing V g in saturation regime in red; run 4: increasing V g in saturation regime in blue.
fit shows the excellent correlation between the two quantities with a y-intercept that is close to zero, which means that in an atmosphere devoid of water vapor, few charges will be trapped at the interface, similar to what is seen in silicon field-effect transistors.
Because the forward reverse branches of the transfer characteristics differ, two threshold voltage values were derived for each measurement set.The threshold voltage shift in the saturation regime is plotted in Figure 10 as a function of the relative humidity with a fitted line which tends toward zero as the relative humidity approaches zero.Information on charge trapping can be derived from the magnitude and sign of the threshold voltage shift (|ΔV T | = |V T(forward) − V T(reverse) |). [35]The change in threshold voltage approaches zero at lower relative humidity values.Moisture enhances charge trapping when the relative humidity is increased (Figure 10), which is consistent with our previous conclusions that water molecules degrade the overall performance  of organic semiconductors and a less-humid environment favors better charge transport due to fewer total charges being trapped.

Annealing
The transfer characteristic curve was measured on diF-TES ADT OTFT after the transistor was exposed to air for several days in ambient lab settings (H ≈ 35% and T ≈ 20°C) and is shown in Figure 11a.The same transistor was then annealed at 70°C for 1h in air and re-measured after cool-down (Figure S4, Supporting Information).The annealing temperature was much lower than the melting temperature of diF-TES ADT (T = 197°C [38] ).The hysteresis was reduced after annealing for 1hr (ΔI d = −0.25 μA at V g = −30 V and ΔV T = −1.1 V).In addition to the reduction of the spread of the hysteresis curves, the mobility increased slightly from 0.027 to 0.030 cm 2 Vs −1 which is still lower than the values given in Figure 3.The results show that the transistor was only partially restored after this procedure.After 2 h of annealing at 70°C the transistor's performance improved and our findings suggest that longer annealing time is required to fully restore transistors with a high hysteresis degree.The transfer curves after annealing are given in Figure 11.Performance degradation occurs if the transistor is left in air after annealing but can be restored once again after subjecting to elevated temperature, which suggests that no morphological changes are taking place.We also saw an improvement in the threshold voltage from −10.8 V to −9.0 V. Annealing, just like relative humidity reduction, reversed the effect of the environment and reduced the hysteresis, as the heat energy facilitates the escape of water molecules from the grain boundaries.This shows that water adsorption is fully reversible and again demonstrates that no chemical reaction or structural modification is taking place in the semiconductor.Finally, these results show that moisture, not oxygen, is the root cause of the effects that were observed because both measurements were made in ambient conditions (H ≈ 35% and O 2 ≈ 20%).We also observed that leaving the transistor in high vacuum for at least 4 h also negates the effects of moisture by pulling out the water molecules that have been incorporated in the semiconductor layer.A more permanent solution would be to encapsulate the transistor with a polymer like Cytop.
Adsorption of water by the semiconductor layer is only a temporary effect and our results show that nitrogen(water) molecules can displace water(nitrogen) molecules from the grain boundaries depending on the moisture level.At low relative humidity device recovery takes place, and device degradation occurs at high moisture levels.We cycled the relative humidity and we recovered the transfer characteristic curves, which demonstrate the reversal of the hysteresis effects (Figure S5, Supporting Information).Hysteresis effects stem from charges that are trapped at the semiconducting-dielectric interface.
To summarize, we have shown that charge transport is affected by the ingress of water molecules into the semiconducting layer through the grain boundaries.Since charge transport generally takes place at the interface between the semiconductor and the dielectric layer, it is likely that water penetrates up to the first few monolayers of the semiconductor.Higher moisture reduces the overall performance of the OTFT and our results show that the changes are reversible if the transistor is annealed, placed in vacuum, or placed in a dry atmosphere.Water has a direct effect on the electrical performance of thin-film transistors which is a key limitation for the application of OTFTs.Our results show that the measured drain current increases with decreasing relative humidity.The threshold voltage shifts toward more positive values, which signifies that in a low-moisture environment fewer carriers have to accumulate initially to form the conducting channel before charge transport can occur, as fewer mobile carriers are trapped.Water molecules can penetrate the microstructure (grain boundaries) of the semiconductor and act as trapping centers.Grain boundaries that extend to the dielectric layer are formed naturally during the fabrication process of polycrystalline organic semiconductors.We quantified the extent of charge trapping by calculating the various trap densities at different relative humidity levels.We found that the density of trapped holes was higher at higher relative humidity which agrees with the above hypothesis.We observed the same trend for the onset voltage, i.e. a negative voltage shift as the humidity increases.The results mean that more mobile holes are trapped when the water content in the diF-TES ADT semiconductor is higher.The percentage increase of the density of trapped holes with increasing relative humidity was roughly equivalent to the percentage decrease of the charge density in the channel, strengthening our conclusion that water is causing mobile carriers to become trapped.We can infer that more mobile carriers are trapped in deep states when the relative humidity is higher because the carrier mobility is lower, suggesting that a fraction of them are lost from charge transport.Our experiments suggests that no morphological/structural or chemical changes took place when the relative humidity level was increased, based on the observation that the plot of the density of trap states remained constant.The same conclusion was reached by measuring the hysteresis effects.The spread of the curves was larger in an environment with higher relative humidity and the difference of the threshold voltage in the positive and negative sweep was used to calculate the trapped charge density at the semiconductor-dielectric interface.We annealed the thinfilm transistor at 70°C and found the effects of moisture to be reversed after annealing; we observed higher drain current and carrier mobility and the onset and threshold voltage shifted toward the origin.Annealing forces water out of the semiconductor and also proves that the performance reduction that we observed was caused by water and not oxygen from the air since both annealing and transfer measurements took place in ambient conditions.Charge trapping is greatly enhanced by increasing the relative humidity level, thus negatively impacting the electrical performance of an organic transistor.We have explained why the measured drain current and hole mobility were lower, the onset and threshold voltage shifted to more negative values and the density of trap states remained constant with increasing relative humidity level.The above results indicate that it is desirable to encapsulate organic thin-film transistors for long-term applications to prevent performance reductions due to relative humidity fluctuations.

Humidity Sensing
Based on the behavior described above, we explored the viability of using diF-TES ADT as a humidity sensor.In earlier sections, we showed that diF-TES ADT thin-film transistors have a linear response with the relative humidity.We extend the measurement by first decreasing the relative humidity and then increasing it to see how the unprotected transistor would respond.The output current in the saturation regime (V g = V d = −40 V) during relative humidity cycling is given in Figure 12.Within the range of the experiment, the drain current followed the same path with slight divergence at H = 12% because the nitrogen flow-rate had to be manually adjusted to continue the change in relative humidity.We stopped at H = 25% because increasing the relative humidity was a much slower process than decreasing it when the source of humid air was the ambient laboratory environment.The value of the relative humidity can be extracted from the drain current by measuring the potential difference across a large resistor.The linear relationships persisted irrespective of the applied gate bias, which is advantageous for practical usage.An organic thin-film transistor based on diF-TES ADT can be used as a relative humidity sensor as-is without any modification after calibrating at two different relative humidity values.A simple calculation would give the relative humidity of the environment of the transistor.A faster measurement can be incorporated by sourcing V d = −40 V and V g = −40 V and measuring only one drain current value.One of the advantages of using a transistor based on diF-TES ADT for humidity sensing is that the response is linear between 8% to 35% humidity meaning that no extra calibration is required.The threshold voltage also changed reversibly with relative humidity (Figure S6, Supporting Information).While the threshold voltage had a larger response (94 mV/%H), a longer measurement (transfer characteristic) has to be made to derive this quantity and the threshold voltage has to be calculated by linearizing the √I d versus V g curve, which can be computationally expensive.We made the same observations with other transistors (different channel dimensions) and in all cases the drain current and threshold voltage were proportional to the relative humidity.
Within the range of the experiment at a moderately-low relative humidity environment, an organic thin-film transistor based on diF-TES ADT was found to be very stable.The stability along with the fact that cycling the relative humidity yields the same parameters show that a diF-TES ADT transistor can potentially be used as a relative humidity sensor.

Conclusion
Water has a detrimental effect on bare organic thin-film transistors as higher relative humidity effectuates a decrease of the overall drain current and carrier mobility and a shift of the onset voltage and threshold voltages to more negative values by increasing the overall number of mobile carriers that are trapped.Water can diffuse through the semiconductor via grain boundaries and accumulate at the gate dielectric.Water can be displaced from the interface of the organic transistor by lowering the relative humidity of the environment, by annealing the transistor, or by placing it under vacuum.The results from density of states calculations seem to suggest that no structural, morphological or chemical changes occurred in the organic semiconductor in the presence of moisture.Organic thin-film transistors based on diF-TES ADT can be used as relative humidity sensors as the output current and the threshold voltage have a linear response with the relative humidity and cycling the relative humidity produces the same output at the same humidity value.

Figure 2 .
Figure 2. Drain current I d at various gate voltages V g in the saturation regime as a function of relative humidity.Measurements were taken at decreasing relative humidity.

Figure 3 .
Figure 3. Threshold voltage in the saturation regime as a function of the relative humidity.Inset: Carrier mobility versus Humidity.

Figure 4 .
Figure 4. Onset voltage versus relative humidity.Inset: Subthreshold swing versus relative humidity.The line is a guide to the eye.

Figure 5 .
Figure 5. Change in trapped (left axis in blue) and mobile (right axis in red) hole charge densities as a function of H.

Figure 6 .
Figure 6.Percentage change in charge densities for trapped holes (blue markers) and mobile holes (red markers) versus relative humidity.

Figure 7 .
Figure 7. Shallow and deep trap density with respect to relative humidity.
in the saturation regime as a function of humidity at different gate voltages.ΔI d is the difference of the drain current in the forward and reverse direction (ΔI d = |I d(forward) − I d(reverse) |) at the same specified gate voltage.
2ΔI d I d(forward) +I d(reverse) ) at V g = −30 V as a function of relative humidity.A line of best

Figure 8 .
Figure 8. Hysteresis at two relative humidity values in both the linear (top curves) and saturation regimes (bottom curves on same plot).a) H = 35% b) H = 7%.Graphs of the hysteresis at H = 24% and H = 14% are given in FigureS3(Supporting Information).Higher magnitudes of the drain current occurred when decreasing V g from +40 to −40 V than when V g was increased.Run 1: decreasing V g in linear regime in blue; run 2: increasing V g in linear regime in light blue; run 3: decreasing V g in saturation regime in red; run 4: increasing V g in saturation regime in blue.

Figure 9 .
Figure 9. Change in drain current due to hysteresis at multiple gate voltages during saturation as a function of relative humidity.Inset: Percentage change in drain current at V g = −30 V as a function of relative humidity with a line of best fit.

Figure 10 .
Figure 10.Variation of the threshold voltage shift with relative humidity in the saturation regime together with a line of best fit.

Figure 11 .
Figure 11.The effect of annealing on transfer curves.a) Before annealing b) after 2h of annealing at 70°C.Color coding as in Figure 8.

Figure 12 .
Figure 12.Drain current in the saturation regime (V d = −40 V) as the relative humidity cycled from high to low and back.