Seamless Feedthroughs for Neurotechnologies Using Diffusion Processes

Electrical feedthroughs are a major part of active implantable medical devices. They are responsible for connecting the implants’ active sites with the processing electronics that are usually hermetically packaged. They deliver conductive pathways through the package wall and have to avoid premature device failure due to ingressing humidity. With decreasing device size, the requirements on the single parts increase, including the electrical feedthroughs. As conventional electrical feedthroughs rely on opening the hermetic bulk material of the package that introduce leak paths, they always raise the potential that water enters the package inside alongside these interfaces. Therefore, a proof‐of‐concept study of a new hermetic electrical feedthrough design that leaves the hermetic bulk material, that is, silicon, intact is presented. The concept is based on diffusing noble metals, Pt and Au, into the semiconductor bulk, resulting in a quasi‐localized resistance increase of the silicon. It is shown that by variation of diffusion temperature, time, the substrate cooling, and others, a parameter combination is found with which optoelectronic components can be driven through an intact silicon substrate.


Introduction
A corner stone that established active implantable medical devices (AIMDs) have in common is the use of hermetic packages that protect the implant electronics from the surrounding environment. Already commercialized AIMDs, with the pacemaker probably being the best-known representative of this group, house the implants' control, recording and potentially communication electronics alongside the active sites. [1] Usually, metal cans providing a hermetic barrier are used.
In general, however, the hermetic barrier provided by the metal cannot be maintained completely as electrical connections need to be routed through the entirety of the package walls, thus introducing interfaces between the different materials. In the worst case, moisture ingress into the package interior alongside these interfaces ends up in short circuits that cause premature failure of the device, leading to the necessity of a complete replacement of the entire implant. This manifests the demand for reliable electrical feedthroughs.
The conventional vertical electrical feedthroughs used for pacemakers and cochlea implants are well-established and realized using glass-to-metal or glass-to-ceramic combinations, [2] with maximum channel counts between 10 and 30. [1,3] The conductance is mainly achieved by metal wires extending through the substrate, whereas the glass or ceramic is responsible to electrically isolate the single channels.
From another point of view, the constant requirement to miniaturize the implanted device and being able to communicate through the hermetic package walls either optically or inductively explains why, especially in the field of non-metalbased housings, many research efforts have been and still are being put into different manufacturing approaches.
Other hermetic package materials include high temperature cofired ceramics (HTCC) or silicon when compatibility with micro-electro-mechanical systems (MEMS) technologies is sought. [4] Feedthroughs based on HTCC are most comparable in material to established technologies. Laser-structuring of the HTCC and screen-printing of Pt metal paste realize embedded, cross-shaped metal tracks [3,5] while at the same time increasing the diffusion paths along the material interfaces. Integration densities of up to 2500 channels cm −2 are achieved, and helium leakage testing predicts functionality of up to 100 years after Electrical feedthroughs are a major part of active implantable medical devices. They are responsible for connecting the implants' active sites with the processing electronics that are usually hermetically packaged. They deliver conductive pathways through the package wall and have to avoid premature device failure due to ingressing humidity. With decreasing device size, the requirements on the single parts increase, including the electrical feedthroughs. As conventional electrical feedthroughs rely on opening the hermetic bulk material of the package that introduce leak paths, they always raise the potential that water enters the package inside alongside these interfaces. Therefore, a proof-of-concept study of a new hermetic electrical feedthrough design that leaves the hermetic bulk material, that is, silicon, intact is presented. The concept is based on diffusing noble metals, Pt and Au, into the semiconductor bulk, resulting in a quasi-localized resistance increase of the silicon. It is shown that by variation of diffusion temperature, time, the substrate cooling, and others, a parameter combination is found with which optoelectronic components can be driven through an intact silicon substrate.
implantation. [5] The laser-based micro-structuring technology opens room for rapid prototyping, but cannot be ad hoc combined with standard MEMS technologies.
This compatibility is achieved and enabled by throughsilicon-vias, which are nowadays mainly used in 3D integration. The inevitable substrate openings are accomplished by deep dry etching steps and sometimes by laser processing. These silicon penetrating holes are in the end filled with metal, either via plating or sputter deposition, [6] achieving very high aspect ratios, [7] while at the same time reducing the lateral expansion of the package compared to conventional methods.
Decreasing the overall size of the devices is of particular interest for applications where small components with edge lengths of a few hundred micrometers are to be implanted, for example, chip-sized optical components as part of optogenetics probes in neural implants in fundamental and translational research. [8] However, reducing the overall device size does not only come with the advantage of being less area consuming, but also introduces new challenges, one of which is that leak tightness of the packaging is crucial to maintain a very low relative humidity (%RH) throughout the life of the package, with material interfaces being one of the main sources for water ingress ( Figure 1A). Maximum amounts of water of 5000 ppm (≈8%RH at 37 °C which means a theoretical dew point below 0 °C), 17 000 ppm [9] or a total of three monolayers of water [10] are or should be permissible so that safe instrument operation is ensured.
In addition, the helium leakage test establishes the maximum allowable leak rates. However, this gold standard for forecasting the overall device lifetime, described in detail in MIL-STD883 and MIL-STD750, [11,12] reaches its practical limits for internal cavity volumes smaller than 3 mm 3 . [13] Although the information gained from these standard test procedures are only forecasts of the theoretical package lifetimes and not a specific absolute time frame of device functionality, the suitability of the package design can be inferred from the results. A summary of rejection limits, corresponding humidity induced package lifetimes that comply with the set standards and minimum internal package volumes that can be evaluated according to the standards, is given in ref. [14].
With increasingly smaller internal package volumes even minimal leak rates can lead to a rapid exceeding of predetermined moisture limits. Especially for these packages, one way to counteract the early saturation is to introduce the minimum amount of leak paths that reach into the package. These usually form at interfaces between different materials.
Given the above limitations, and as a first step toward minimizing leakage paths, it is advantageous to realize feedthroughs that do not require opening of the substrate and creation of additional material interfaces ( Figure 1B, compare Section 2). Taking into account the state of the art, it is evident that there is indeed room for further research toward new hermetic electrical feedthrough concepts. This applies in particular to approaches that ensure complete tightness of the housing over an "indefinite" time period. Such feedthroughs are not yet available, but can in the future help to improve the development and forthcoming of polyimide-based optical neural probes, where small discrete devices are to be implemented directly at the target site ( Figure 1C).  Comparison of vertical feedthrough approaches to control, for example, discrete optical elements through a package substrate and potential application for new feedthrough design, where a miniaturized hermetic package is integrated into a polyimide substrate. A) Conventional electrical feedthrough approach with metal filled holes inside a ceramic or semiconductor material, where material interfaces are potential paths for water (H 2 O) ingress leading to an excess amount of humidity (>8%RH) inside the internal package volume promoting short circuits and potential device failure. Herein described diffusion-based feedthrough approach where water ingress through the package substrate, that is, a semiconductor, is circumvented by design. B) The gray shaded area depicts doped substrate areas, whereas the bulk material acts as electrical feedthrough. C) Hermetic package with diffusion-based feedthroughs assembled together with a polyimide electrode forming a part of an optical probes to be used, for example, in optogenetics applications or other approaches where light is needed at the implantation site. barrier ( Figure 1B). The basis to the approach is based on the diffusion of transition metals Pt and Au into n-type silicon. Other than the well-known materials for silicon doping, such as boron (B) forming an acceptor level or phosphor (P) forming a donor level a few meV away from the respective band edge within the silicon bandgap, the levels introduced with hybrid materials (Pt and Au) are located deep within the bandgap. For Au as an impurity, a triple acceptor level is located at E C − 0.54 eV and a donor level at E V + 0.35 eV. [15,16] For Pt, the acceptor levels dominate. A double acceptor is located at E C − 0.25 eV, whereas a single acceptor level is located at E V + 0.36 eV. [16,17] A single donor level is located at E V + 0.3 eV. [17] In the case of Pt and Au, this can lead to an n-to p-type conversion of the semiconductor for a sufficiently high impurity atom concentration inside the semiconductor. [17][18][19] Although, especially in the field of fast-switching electronics usually undesired, the formation of deep trap levels in the semiconductor bandgap acting as recombination centers it the key to the presented technology. The kinetics and interactions of these active recombination centers are described with the Shockley-Read-Hall equation. [15] As a consequence, the diffusion of these hybrid materials, that mainly diffuse via different indirect mechanisms, [20] increases the resistivity due to an increase of charge carrier recombination in these areas. The resistivity increase is utilized in such a way that quasi-isolation between different regions to be separated from each other is achieved by metal diffusion into certain regions of the substrate material (Figure 2). Electrical conductivity is affected by a reduced minority charge carrier lifetime due to increased impurity concentrations [15] which consecutively decreases the current flow upon the increased recombination rate. [19] Additionally, the resistivity is directly affected by the overall decreased mobility. [15] With this, metal impurities that are usually non-desired are implemented explicitly to reduce electrical conductivity, one of the favored effects for the herein presented approach. [21] Hence, well-known correlations from semiconductor physics are transferred to neural implants, and in particular optical probe development.

Introduction of Vertical Electrical Feedthrough Design and Theoretical Background
Isolation could even be promoted by conversion of the silicon substrate from n-to p-type, forming locally induced backward-switched pn-junctions [17,19,22] (Figure 2A).
Ultimately, the doped bulk silicon itself, rather than metal, acts as the electrical connection from the interior to the exterior of the micropackage and vice versa. Isolation is achieved by completely surrounding the feedthrough with width w FT with a diffusion metal frame w DMF ( Figure 2B).
Unique features of the presented concept can be summarized as follows: i) Compatibility with standard MEMS technology is ensured because of silicon as the chosen substrate material. ii) The material itself acts as feedthrough, so that no additional material deposition is necessary and no further interfaces are introduced. iii) Fundamental relationships of semiconductor physics can contribute to the improvement of functionality by converting the substrate from n-to p-type.
Given the nature of the presented feedthrough concept, the main parameters influencing the actual performance of the diffusion-based approach are assumed to be diffusion temperature T DIFF (800, 1000, and 1200 °C), diffusion time t DIFF (0 min to 2 h) and the cooling rate of the substrate after diffusion, which should be as high as possible (highlighted with "fc," fast cooling). All other samples were cooled slowly ("sc," slow cooling).
Since this approach is a trade-off between the uniform distribution of impurities throughout the material [23] and the lateral diffusion of the metal, the diffusion time t DIFF was studied in a wide range. However, the diffusion time was chosen depending on the study presented and the knowledge gained from preceding studies. First, a parameter set to obtain a high current reduction was sought. Then, taking into account the previous results, it was investigated at which parameter combination the lateral diffusion component, which cannot be avoided, has the least influence on the conduction through the substrate. Since Au in particular diffuses very rapidly in silicon, the diffusion temperature T DIFF was also varied. Especially for the electrical measurements it was important to get an idea of how diffusion process affects the measurement result. For this reason, reference measurements were performed with non-diffused samples, which are presented below at the appropriate sections.
The main experiments to derive applicable diffusion parameter sets were conducted using phosphorus-doped wafers with a resistivity of 1-10 Ω·cm at different crystal orientations ( Table 1). Different crystal orientations were chosen since an influence on the metal's diffusion properties was assumed. [21,24] Substrates with lower initial resistivity obtained by doping with arsenic (As) or antimony (Sb) were discarded, as they are not gettering the metal impurities. [25] As a decreased wafer thickness obviously decreases diffusion length, feedthrough designs with ohmic contacts were fabricated on substrates ground down from their initial thickness of 525-300 µm (Table 1).
Pt and Au as transition metal were chosen as they are standard materials in the field of implant design. [  and at this point more important, they diffuse fast in silicon and are capable of resistance increases of several orders of magnitude. [27] In addition, a potential n-to p-type conversion of the substrate is possible. [17,19,28] Diffusion parameter (prefix "P") and feedthrough (prefix "FT") studies were carried out using all of the presented metals in combination with all of the presented silicon substrates (Table 1).

Optical Analysis of Diffusion
Before investigating the electrical properties of the presented substrate-metal combinations, the optical appearance after metal diffusion at different diffusion time t DIFF and diffusion temperature T DIFF combinations were studied. To start with, the metals Au and Pt were uniformly deposited on the surface and occurred shiny before diffusion ( Figure    Differentiation is made between diffusion parameter study (prefix "P"), and the substrates used for the feedthrough designs (prefix "FT"); Used substrates differ in crystal orientation, resistivity, and thickness.
"Cleanroom Fabrication Process"). The thin-film layers were highly reflective, making it difficult to visualize the samples before and after diffusion simultaneously with the same microscope settings as after diffusion. Therefore, the visual appearance of different substrates, that is, P_100_10 and P_111_10, after varying the diffusion parameters T DIFF and t DIFF , with either Pt or Au as the diffusion metal ( Figure 3B) cannot be directly compared to the visual appearance before diffusion ( Figure 3A).
The main differences in optical appearance were visible at a temperature increase from T DIFF = 800 °C to T DIFF = 1200 °C. The temperature increase affected both substrate types equally. From this, it was deducted that T DIFF has a high influence. The significance of this visual result has later been electrically evaluated (compare Section 3.2).
Whereas for Au, the influence of temperature was already clearly visible for T DIFF = 800 °C (t DIFF = 30 min) for both ⟨100⟩ and ⟨111⟩ substrates, the Pt surface appeared dull and greyishblue after applying these parameters. Starting from a diffusion temperature T DIFF = 1000 °C, the influence of the diffusion process became more visible for Pt.
For Pt in particular, there was a marked change in optical appearance after t DIFF = 2 h. The increase of the diffusion time t DIFF led to more concise changes than an increase of the temperature T DIFF alone. In contrast, the Au surfaces did not change their appearance dramatically from t DIFF > 30 min.
The metal surface generally looked more "drop-shaped" after diffusion into ⟨100⟩ substrates, especially for T DIFF = 1200 °C independent of the metal used. After diffusion into ⟨111⟩ substrates, the appearance was more "line-shaped." This difference was more pronounced for Pt than for Au.

Electrical Evaluation of Diffusion Parameters
Without further processing, non-linear Schottky contacts were established between the probe pins and the silicon (Figure 4A,B, compare Section 5 "Electrical Measurements"). Additional process steps form ohmic contacts between the substrate and the needles or the connected optoelectronic device ( Figure 4C).
After diffusion, the bulk resistance R B of the substrate was influenced by the diffused area. The diffused area should spread vertically through the bulk material and increases R B by the resistance of the diffused area R DIFF . Every measurement has been performed before and after diffusion independent of the contact structure. The goal was to achieve high isolation between two adjacent feedthrough structures, whilst maintaining a high conduction through the bulk material.

Isolation after Diffusion
Diffusion conditions influenced the isolation resistance and currents which were measured across the metal frame w DMF around the feedthroughs (compare Figure 4A,B). Comparing the currents I FT,ISO , which were measured before diffusion (b.d.), with those measured afterward (a.d.), the current reduction factor (CRF), which should be maximized to achieve high isolation, was obtained. In contrast to optical inspection, electrical characterization of the voltage-current curves allowed quantitative evaluation of the process parameters and assessment of usability in the actual applications. In the following, the results of the Pt diffusion are presented first. Subsequently, the results of the Au diffusions are shown.  At T DIFF = 1200 °C, however, I FT,ISO decreased to 0.2 mA ± 0.09 mA (n = 18). Fast cooling (fc) further decreased this value to I FT,ISO = 0.09 mA ± 0.06 mA (n = 11) ( Figure 5D). All values for I FT,ISO given in the text were measured at U FT,ISO = 32 V. In addition, a reduction of the measurement deviations was observed from a certain degree of current reduction.
Depending on the metal-semiconductor-to-diffusion parameter variation which has been studied, results (n = 6 to n = 9) from each of 12 independent groups were statistically analyzed. Analyzing the data for slow cooling (sc) showed that an increase of T DIFF from 800 to 1200 °C had a highly significant main effect (p < 0.001) on the resulting current I FT,ISO (Figure 6A). Diffusion time t DIFF and substrate orientation as main effects and the interaction effects between the different groups were not significant. Furthermore, the influence of the applied cooling  for slowly cooled (sc) data shows a highly significant influence of T DIFF . B) Data of samples diffused at T DIFF = 1200 °C also showed a highly significant influence of the applied cooling rate (sc vs fc), as well as a three-way interaction between cooling rate, t DIFF and substrate orientation. The y-axis scaling differs for (A) and (B). The sample size was n = 6 to n = 9, dependent on the analyzed group (n = 12). Highly significant ***: p < 0.001, significant *: p < 0.05 (here: p = 0.011). rate was investigated. Therefore, results from samples that were diffused at 1200 °C but cooled down at different cooling rates were examined. The applied cooling rate was found to be a highly significant main effect (p < 0.001) ( Figure 6B, sc vs fc). In addition, a three-way interaction between the applied cooling rate, t DIFF and substrate orientation (p < 0.001) was observed. Post-hoc testing revealed that for a <100> substrate orientation, fc and t DIFF = 2 h a highly significantly (p < 0.001) lower current was measured than for t DIFF = 30 min. For <111> substrates and t DIFF = 30 min a significantly (p = 0.011) lower current was measured ( Figure 6B).
For Au diffusion, the influence of t DIFF on the achieved current reduction was one of the main differences from Pt diffusion which is pointed out below. The data for the exemplary curves shown below were summarized from P_100_10 and P_111_10 substrates. Shown is the progress of the mean value of I FT,ISO across the applied voltage U FT,ISO range with their corresponding standard deviation. The Au was deposited within grooves (Figure 7).
This data showed that a recognizable reduction of I FT,ISO using Au was also achieved for t DIFF < 30 min. No drastic current increase was measured up to U FT,ISO = 60 V. Thus, at U FT,ISO = 60 V, I FT,ISO = 0.31 ± 0.19 mA for t DIFF = 30 min and I FT,ISO = 0.20 ± 0.11 mA for t DIFF = 10 min (fc) was measured.
Results of Au-diffused samples (n = 3 to n = 9) were also statistically evaluated from each of 8 independent groups, depending on the variation of the metal-semiconductor diffusion parameters. The analysis showed that the diffusion time t DIFF factor has a significant (p = 0.036) main effect on the resulting I FT,ISO ( Figure 8A). In contrast to Pt diffusion, lower t DIFF revealed a decrease in I FT,ISO . Diffusion temperature T DIFF as other main effect and their interaction effect were found to be not significant. However, a trend for a decreased a I FT,ISO is visible from looking at the data ( Figure 8A, 800 °C vs 1200 °C). In a further investigation, the effect of the applied cooling rate was analyzed for T DIFF = 1200 °C here as well ( Figure 8B). Here it was found that the main effects t DIFF and the cooling rate have a significant effect (both p < 0.001) on the result. However, their interaction effect showed to be not significant.
For Pt diffusion the highest impact on current reduction with a maximum CRF ≈ 24 (U FT,ISO = 32 V) was obtained for P_100_10 substrates at t DIFF = 2 h (n = 6). However, with such long diffusion times, lateral diffusion should not be underestimated. A factor getting more important in the following sections. Therefore, it should be mentioned that for t DIFF = 30 min, a CRF ≈ 17 for P_111_10 substrates (n = 7) was determined.   For Au as diffusion metal, the highest CRF was determined at t DIFF = 30 min with CRF ≈ 115 for P_111_10 substrate samples (n = 6). This was followed by CRF ≈ 69 for t DIFF = 10 min (n = 6) and CRF ≈ 63 for t DIFF = 5 min (n = 6), both for P_111_10 substrates as well.

Volume Conduction through Bulk Material
While the previous section focused on deriving parameter sets responsible for high isolation (measurement of I FT,ISO ) between different non-diffused areas (compare Figure 4A,B), the following section focuses on I FT measured through the bulk (from front side to back side). Therefore, volume conduction measurements from the top to the bottom of the substrate were conducted before and after diffusion. For the later application, volume conduction values in the same range as before diffusion are desirable. However, as the lateral diffusion component will affect the conduction through the bulk, t DIFF was decreased compared to the previously presented study.
To determine the suitability of the parameter set used, the quotient VC FT , defined as I FT,b.d. /I FT,a.d. being the current flow before compared to the current flow after diffusion, was determined in the following and should be ≤1 in the best case. Achieving a VC FT ≤ 1 indicates no influence of lateral diffusion. This quotient is equivalent to the CRF of the isolation mode measurements. Accordingly, both factors can be compared with each other.
Because of the preceding results, measurements with T DIFF = 1200 °C were considered primarily. As a comparison, measurements with T DIFF = 800 °C were recorded ( Table 2).
The best VC FT results were achieved for Pt diffusion at t DIFF = 0 min and 5 min, whereas t DIFF = 5 min resulted in VC FT ≈ 0.84 for ⟨100⟩ substrates (t DIFF = 10 min), compared to VC FT ≈ 0.69 at t DIFF = 0 min. Comparing this to results from Au diffusion executed at the same parameters showed that values in the range of the determined CRFs were measured (t DIFF = 5 min). Numerically expressed, CRF ≈ 32 and VC FT ≈ 18 for ⟨100⟩ substrates indicate a massive influence of lateral diffusion.
Diffusion of Pt at T DIFF = 800 °C also gave promising results for ⟨100⟩ substrates. However, it is known from isolation verification measurements that the overall CRF achieved at this temperature is not comparable to that at T DIFF = 1200 °C. The insufficient distribution of impurities over the entire substrate at T DIFF = 800 °C is verified by the large deviation in the derived data for both substrate types investigated.
For Au diffusion, however, the distinctness is diminished to a point where no differentiation between isolation and volume conduction is possible, independent of t DIFF . Results showed that this was already the case for t DIFF = 5 min.

Design with Ohmic Contacts
From the preceding results (isolation and volume conduction) it can be concluded that with the available equipment, a higher process control is given for the fabrication of the feedthroughs with Pt diffusion. The volume conduction measurement results proved this, as no distinction between isolation and volume conductance measurements for Au could be derived for the given combinations of geometric features and parametric variation. Therefore, although a higher CRF was determined for Au during isolation measurements, the final feedthrough substrate was fabricated using only Pt as diffusion metal.
Wafers with ohmic contacts on the front and back side were therefore only fabricated with Pt as diffusion metal. Results from isolation and volume conduction measurements were combined to define the applied t DIFF . This allows for adequate volume conduction as well as an adequate CRF in Pt-diffused samples.
In view of the advantages of using a higher aspect ratio w FT to diffusion length, wafers were thinned down to 300 µm, and only structures with w FT = 1.4 mm were investigated. The diffusion process at T DIFF = 1200 °C was always terminated by fast cooling (fc). The diffusion time t DIFF of the Pt was set to 5 min for FT_100_10 substrates and to t DIFF = 2.5 min for FT_111_10 substrates (compare Table 1). The overall diffusion time was halved for FT_111_10, because the Pt was deposited on the front and back side of the silicon substrate.
While in the isolation measurement mode, no pronounced w DMF dependence was observed, this was no longer true for the present series of measurements. Within the experimental conditions studied, the best R ISO /R FT ratios achieved were in the range up to ≈5 at w DMF = 10 µm.
The ratio decreased by ≈50% when increasing w DMF from 10 to 50 µm for FT_100 substrates. For FT_111_10 substrates, a drop of the R ISO /R FT ratio occurred for w DMF > 50 µm. For the later, the diffusion metal was deposited on both wafer sides.
No explicit dependency could be determined from either t DIFF or the used substrate type. At w DMF > 200 µm, the R ISO /R FT ratios increasingly approached values, ≈1. That was observed for all substrates, independent of orientation and t DIFF applied.

Operating an Optoelectronic Component
The functionality of the feedthrough designs that showed the best R ISO /R FT ratios within the previous section were verified in combination with an assembled blue LED with an optoge-  The wafers with the assembled LEDs were placed on a specifically for this purpose designed measurement supporting structure and controlled from the back side (Figure 9A,B). The silicon substrates with the mounted LEDs on the front side were connected with their back side to spring probe pins and from there to the measuring equipment (compare Section 5 "Electrical Measurements").
The LEDs were then controlled with a 10 kHz square wave at a duty cycle DC = 0.5. Applied voltage U FT amplitudes were 0.5-10 V. A visual inspection and recording of I FT confirmed that it was possible to control the LEDs independently vertically through the substrate with the developed hermetic feedthroughs, without unintentionally illuminating neighboring devices.
The current to voltage characteristics were recorded in eight independent measurements in the range from U FT = 0.5-10 V ( Figure 9C). These were compared with measurements of LEDs of the same types (n = 5) connected conventionally to the measurement equipment. Conventional (compare Conv. wiring) is to be equated with high ohmic isolation between both LEDs ports and low resistance wiring to the equipment.
A decreased I FT,LED per applied U FT,LED was measured for both substrate types compared to conventionally wired LEDs of the same type. For λ = 470 nm and U FT,LED = 4 V, an I FT,LED ≈ 1.5 ± 0.1 mA for FT_100_10 and I FT,LED ≈ 4.8 ± 0.1 mA for FT_111_10 was measured. Conventionally wired LEDs achieved ≈ 16 mA for the same U FT,LED applied ( Figure 9C). For substrate FT_100_10 ( Figure 9C), a shift of the LED threshold voltage to higher values followed by a transition point of the curves that showed linear behavior from that point was observed. The measured characteristics follow what is expected for resistive losses. The first source for resistive losses is from the substrates resistivity that it naturally exhibits due to its dopant concentration. Second, the compared to the conventionally wired decreased isolation resistance between the two LED terminals is responsible for the dropped slope of the curve. Effects of substrate heating on the performance of the feedthroughs were not further investigated in this proof-of-concept study, since the total heating should be kept below 2 K in view of future application.
With these results presented, one of the key components to build a hermetic package for discrete LED chips has successfully been demonstrated. The feedthrough substrate will build the base for a hermetic package that on the one hand protects the LED from the surrounding environment and with its feedthroughs on the other hand serves as bridging connection of Figure 9. Measurement setup to verify feedthrough functionality and results for blue LEDs controlled with the new vertical feedthroughs. Silicon substrates with feedthrough structures and mounted LEDs are placed on spring probe pins hold in place by a Teflon structure. Spring probe pins were connected to a f = 10 kHz square wave with swept voltage U FT (A). Picture of therewith illuminated blue LED (B) and corresponding illuminance of LEDs controlled through the substrate (C). Blue LEDs with λ = 470nm were connected to equipment from the bottom side of the substrate. All LEDs were driven with a square wave signal with f = 10 kHz at a duty cycle DC = 0.5. As a comparison, results for LEDs that were conventionally wired (Conv. wiring) are given. For conventionally wired LEDs no (vertical) feedthroughs were used for LED control.
the LED to the external equipment. Implementing the package as a whole and integrating it into, for example, an electrode array, will form the envisaged optrode (compare Figure 1C).

Discussion
Temperature and time are the main influencing factors to obtain high isolation, that is, high CRF factors. The diffusion temperature T DIFF was determined to be one of the main influencing factors for both Pt and Au diffusion. This was shown by optical as well as by electrical analysis. Only one other diffusion parameter analyzed achieved a comparable influence on the current reduction, the fast cooling.
The temperature-dependent diffusion constant of the used materials in silicon explains the diffusion time t DIFF dependency of the results obtained. The high diffusion constant of Au [29] in silicon is responsible for achieving the most promising results for t DIFF < 30 min. Hence, the process controllability is reduced, and the dependency on fast cooling increases. Thus, the lower diffusion constant of Pt in silicon [29] is responsible for an increased process controllability and more constant results with varying t DIFF for diffusion times t DIFF > 30 min.
The difference in diffusion constants is also responsible for the greater influence of fast cooling (fc) within Au diffusion compared to Pt. This method abruptly stops the diffusion process in vertical as well as lateral direction. Referring to the measurement setup, lateral diffusion can influence the electrical evaluation depending on its extent. Here, lateral spreading plays a role, especially for Au diffusion. This is most likely also the reason for the unspecific results obtained for different w DMF . In agreement with the results with varying t DIFF , the Pt diffusion is only slightly affected by w DMF . This is also because only structures with w FT > 1 mm were investigated, hence the lateral diffusion component had less influence.
It is known that the diffusion process is dependent on T DIFF , the dopant, and the concentration gradient, amongst others. However, it is also dependent on the crystal orientation of the substrate that is used. [30] That the substrates' crystal orientation influences the diffusion process was observed both in the visual inspection and in the electrical measurements.
Whereas a dependency on crystal orientation was optically visible for both diffusion metals, a significant influence on the electrical behavior was only derived for Au diffusion into silicon. There, a higher current reduction was achieved for ⟨111⟩ substrates. This is explained by the fact that ⟨111⟩ substrates do have a higher amount of surface atoms compared to ⟨100⟩ substrates, meaning that more bonds per area are available. Due to this, ⟨111⟩ surfaces have a higher defect density, which in turn is the basis for the underlying diffusion mechanisms inside the silicon crystal.
In general, a combination of fast cooling (fc) at high T DIFF is promising. From the results obtained, it is clear that the diffusion time t DIFF must be selected in such a way that the feedthrough conductivity is not negatively affected to an excessive extent due to lateral diffusion.
This directly leads to the results obtained for the volume conduction VC FT , which contrary to CRF which is best as high as possible, should be ≤1. While long t DIFF are not critical for determining the isolation between different structures, this is no longer true for measurements from the top to the bottom of the substrate. In other words, the lateral diffusion component can no longer be neglected for this type of measurement. Instead, it plays an essential role for conductance through the substrate. As an example, for t DIFF < 30 min, measurement results for Pt diffusion differed when measuring either across a metal frame or not. This effect vanished for t DIFF > 30 min.
If one now summarizes the estimated results of the required diffusion times t DIFF with the concentration distribution of the impurities, the following situation arises. A concentration equilibrium over the entire material occurs with increasing diffusion time. [23] The proposed process will therefore always be a trade-off between achieved isolation resistance R ISO and volume resistance R FT since both always influence each other.
This is of particular interest if one of the basic requirements, that is, miniaturization of the overall device, is to be met. Successful miniaturization means that lateral expansion, that is, w FT , cannot be increased to the point where lateral diffusion can be neglected in any case. However, a move in the right direction would be to increase the aspect ratio w FT to diffusion length. This means that metal must either be deposited in deeper grooves to shorten the diffusion length successfully, the substrates must be thinner while maintaining the same w FT , or both must be combined.
The aforementioned necessary trade-off and parameter and design adaptions were considered for the final feedthrough designs to achieve both high isolation and sufficient conduction through the substrate. These measurements with assembled LEDs in principle confirmed the functionality of the proposed hermetic feedthrough system. However, the determined U FT to I FT behavior differed from those of conventionally Au ball-wedge bonded devices. First, by the overall achieved current flow through the LED and second by the curve shape. The first effect is mainly explained by the substrate resistivity that the substrates naturally exhibit due to their amount of impurity dopants, that is, phosphorus. This effect could not be prevented or circumvented since only phosphorus as dopant exhibits the required metal gettering properties.
Second, the LED behavior is overlaid by a resistive portion, responsible for kinking and linear appearance of the curves at U FT ≈ 5 V for FT_100_10 ( Figure 9B). Based on the overall appearance of the U FT to I FT behavior, it is also assumed that the n-to p-type conversion was not successful with the used combination of substrate type and diffusion parameters. If the conversion had been successful, no linear relationship between U FT and I FT should have been observed.
Measurements where both ports of the LED were closer together resulted in I FT values that were halved compared to FT_100_10 ( Figure 9A). It confirmed the influence of lateral diffusion and the fact that the functionality of the LEDs was indeed a result of diffusion and not only from substrate resistivity.

Conclusion and Outlook
Doped semiconductors can serve as feedthroughs without material interfaces. The presented proof-of-concept data showed that leak path-free, diffusion-based electrical feedthroughs can successfully be fabricated. The applicable parameter range is a tradeoff between uniform distribution of impurity atoms and thus uniform and sufficient current reduction and lateral diffusion. However, with the available equipment in combination with the available designs, the present limits in fabrication and material selection, it was possible to derive parameter sets with which LEDs can be controlled vertically through the substrate bulk.
Future studies should include investigations to gain deeper insight into the actual diffusion profile within the semiconductor bulk material. Techniques such as secondary ion mass spectroscopy (SIMS) or time-of-flight SIMS could be supportive in this manner. This would allow a more precise determination of lateral feedthrough expansion and therefore of feedthrough and finally overall package size. By the time the experimental runs were carried out, no such device was available.
In summary, within the process limits presented, the results presented offer the possibility of producing the bottom of hermetic packages in such a way that no additional leakage paths need to be introduced into the package. In terms of overall device lifetime, especially for optical probes with distributed micropackages specifically designed for discrete optical components, and with the limitations of maximum amounts of water, the presented approach is worth to consider in future studies.

Experimental Section
Cleanroom Fabrication Process: The fabrication process was adjusted with respect to the type of study, "P" or "FT" (compare Table 1), that is, certain manufacturing steps are added or omitted.
The process requires surfaces that are free from organic and inorganic residuals as well as from natural oxide. Organic and inorganic residuals were removed by Caro's acid (H 2 SO 4 + H 2 O 2 ) followed by a quick dump rinse and an HF dip to remove oxide layers. The following two fabrication steps to establish ohmic contacts on the substrate's front and back side were only used for the final design study (prefix "FT"). To be able to establish ohmic contacts on the silicon surface, a 250 nm thick, highly P-doped poly-Si layer with an approximate sheet resistance of around 25 Ω ▫ (data from IMTEK cleanroom service center (RSC)) was deposited with low pressure chemical vapor deposition (Centrotherm E1200 HT oven (260-4), Centrotherm thermal solutions GmbH + Co. KG, Blaubeuren, Germany). This deposition process was usually followed by an annealing step. However, due to the diffusion process applied, this step was skipped and no annealing was performed directly after depositing the poly-Si.
Structuring of the poly-Si on the wafers' front and back side was done using AZ 4533 as a masking layer, followed by a dry etching step. The dry etching step was performed in an inductively coupled plasma (ICP) reactor (ICP Etcher, Surface Technology Systems Inc., Newport, Wales).
To reduce diffusion length, some substrates then underwent a deep reactive ion etching step (ICP Etcher, Surface Technology Systems Inc., Newport, Wales). In this step grooves ("g"), around 70-75 µm deep, were realized on the substrate surface, in which the diffusion metal (Au) subsequently was deposited.
Prior to metal deposition, the substrates were again cleaned using Caro's acid and an HF dip, which was directly followed by a static fullwafer metal evaporation. A 300 nm layer of the diffusion metal (Pt or Au) was deposited.
Again, photolithographically structured AZ 4533 was used as a masking layer for the following etching step. Pt and Au were then dryetched using RIE.
When double-sided ("ds") diffusion metal deposition was used instead of single-sided ("ss") deposition only, metal evaporation and patterning was repeated on the back side of the substrate.
The actual diffusion step was performed outside the cleanroom. Diffusion of the metal is the last processing step for substrates that were used for the parameter study ("P").
Substrates for feedthrough measurements ("FT") were then transferred back into the cleanroom, where the evolved surface oxide was removed with 5% HF. Afterward, the contact metal (300 nm Al) was deposited and wet-chemically structured on both wafer sides.
Diffusion Process: The diffusion parameter studies (prefix "P"), as well as the diffusion for the feedthrough studies (prefix "FT"), had been carried out under oxygen atmosphere (Austromat 3001, DEKEMA Dental-Keramiköfen GmbH, Freilassing, Germany). Investigations on the applicable HR showed that the maximum settable HR SET that reliably produced repeatable results was 60.0 °C min −1 . Measuring the actual HR resulted in HR MEAS = 60.5 °C min −1 .
The diffusion temperature T DIFF was set to 800, 1000, or 1200 °C, respectively. The plateau was then kept for t DIFF ranging from 0 min to 2 h. A diffusion time t DIFF of 0 min indicates that the cool down process of the sample was started immediately after the set temperature was reached. Nonactive slow cooling ("sc") resulted in cooling times of about 160 min to cool down from 800 to 100 °C. To achieve faster cooling rates, the samples were removed from the combustion chamber at 800 °C by opening the same. The diffused samples were then placed on a ceramic plate (Al 2 O 3 , 96% Rubalit, A.L.L. Lasertechnik GmbH, München) to cool down within seconds, which stopped the diffusion process. The samples that were treated with this cooling method are highlighted with "fc" standing for fast cooling.
Electrical Measurements: The measurements were performed with either a needle prober with tungsten needles (Ø TIP = 7 µm) or in combination with spring probe pins (1002-B-0.4N-RH-0.37, PRT, Messtechnik GmbH, Werne, Germany) for through substrate conductance evaluation. Either two needles or two spring probe pins were used to connect the sample to the measurement equipment (compare Figure 4 and Figure 9A).
To evaluate the voltage-dependent behavior of the structures, voltages U FT,ISO for top side isolation measurements or U FT for through substrate conductance measurements were applied, and the corresponding current flow I FT,ISO or I FT was measured ( Figure 4). U FT,ISO , and U FT were varied from 0 to maximum 60 V.
Statistical Analysis: Statistical analysis was performed to determine if certain parameters or parameter combinations had a significant effect on the results. Available data from the diffused samples were log transformed and then fitted to a generalized linear model. In the first step of the analysis, the diffusion temperature T DIFF , the diffusion time t DIFF and the substrate orientation were investigated depending on the type of metal studied. Subsequently, the influence of the selected cooling rate, fast cooling (fc) or not, was investigated. For a significant main interaction, a follow-up post-hoc test using pairwise comparisons was used. The software R was used for the statistical analysis.