High-Resolution 960 (cid:1) 540 and 1920 (cid:1) 1080 UV Micro Light-Emitting Diode Displays with the Application of Maskless Photolithography

active matrix 370 nm ultraviolet (UV) micro light-emitting diode (micro-LED) displays with full high-de ﬁ nition resolution of 960 (cid:1) and high pixel densities of almost and 3200 pixels per (PPI), are A novel self-aligned process is used to micro-LED with the inverted trapezoidal-shape mesa, is different the conventional vertical mesa for the micro-LED array. with on the characteristics, the low of and of and and pA and light output powers of and 71 ﬂ ip-chip micro-LED has higher light output power of 2.6 mW than the (cid:1) micro-LED display of mW at the same driving current of 100 mA and voltage of Both the UV micro-LED displays demonstrate the delivery of graphic images and simple pattern-programmable maskless photolithography on resist-coated wafers.


Introduction
III-nitride light-emitting diodes (LEDs) have drastically improved the luminous efficiency of solid-state lighting and are steadily replacing compact fluorescent light bulbs and other illumination sources. [1][2][3] Augmented and virtual reality (AR and VR) require a smaller form factor display with a high resolution while maintaining high efficiency and uniform brightness to lower the power consumption. To achieve these goals, GaN-based micro-LED displays are promising in terms of improved brightness, luminous efficacy, high frequency response, and long lifetimes. [4,5] Most groups have fabricated single-color visible micro-LED arrays with the pixel sizes as small as 5-10 μm. [6][7][8] Our previous work demonstrated a highperformance of the active matrix (AM) 960 Â 540 blue-emitting microdisplay with 2000 pixels per inch (PPI) for a pixel size of 8 μm and a pixel pitch of 12.8 μm. [9] These micro-LED displays can deliver pictures and video images and can be used in applications of smart phones, smart watches, head-mounted and near-eye displays, [10][11][12][13] and optogenetic stimulation. [14][15][16][17] Several groups reported on the progress of broad-area (0.1-1.0 mm) UV lightemitting diodes (UV-LEDs) in the 260-390-nm range, [18][19][20][21][22][23] including milliwatt-level continuous-wave performance at selected wavelengths and more than 100 mW pulsed output at high injection currents. [20] Such devices are opening up improvements in white LEDs for solidstate lighting applications by using the watt-class UV-LEDs at 370 nm or shorter wavelengths, and are also expected to offer wide applicability in areas including chemical and biological sensing devices, in sterilizers, and as exposure tools for photolithography. Recently, active matrix-addressable UV microemitters are highly attractive as specialized photolithographic and photochemistry exposure tools as arbitrary image patterns can be generated and transferred to a UV-sensitive material such as a photoresist without the need to manufacture expensive photomasks. [24,[26][27][28] Furthermore, this could provide a simple approach to build the 3D structures via stereo photolithography. Zhang et al. reported a fully integrated active matrix-programmable micro-LED system on panel (SoP) with a resolution of 60 Â 60 and a pixel pitch of 70 μm. [19] Jeon et al. fabricated the ultraviolet micro-LED pixels, each of 20μm diameter, in a 64 Â 64 matrix-addressable array at 368 nm. [20] Liu et al. reported that the design and fabrication of a light-emitting diode on silicon (LEDoS) microdisplays with red, green, blue, and UV colors in a resolution of 360 PPI by integrating monolithic LED microarrays and active matrix substrates using flip-chip technology. [22] McKendry et al. reported the improved results from 370 nm 8 Â 8 micro-LED pixels, each of 72 μm diameter, integrated with a custom-designed complementary metal-oxide-semiconductor (CMOS) driver. [23] Jeon et al. integrated a UV-curable polymer microlens array onto a 64 Â 64 matrix-addressable 368-nm micro-LED array having 16 μm diameter and 30 μm spacing. [24] By adjusting the mechanical clearance of the lens and the lens shape, the emitted beam was well collimated over 500 μm distance along the optical axis with about an 8 μm beam diameter. A pattern generated with the emitter device equipped with a microlens array was transferred to an i-line photoresist. This device was demonstrated as a photolithographic exposure tool, where the pattern-programmable micro-LED array plays the role of both light source and photomask. [24] Despite these efforts, surface recombination at small dimensions has been noted as a potential source of reduced efficiencies across the III-V family of compound semiconductors. [6] The surface recombination or sidewall damage increases with the shrinkage of the micro-LED size, which leads to increase of the leakage current. [25] The leakage current can be effectively suppressed by dielectric sidewall passivation such as plasmaenhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD).
In this article, we report the fabrication and characterization of high-resolution 960 Â 540 and 1920 Â 1080 micro-LED arrays that reach high PPI values of 2000 and 3200, respectively. The AM micro-LED arrays were flip-chip bonded with an individually addressed CMOS-controlled driver connected by indium bumps deposited on each pixel. We successfully demonstrated the microdisplays with the help of an software development kit (SDK) module to realize the delivering graphic image. The 960 Â 540 and 1920 Â 1080 AM micro-LED displays by flip-chip bonding have operability of 95.4% and 80.9%, respectively. This is the first demonstration of a high-resolution UV microdisplay with an aspect ratio of 16:9, which is the mainstream of highdefinition television (HDTV) nowadays. Finally, the application of maskless photolithography is also demonstrated by directly covering the Si wafer coated photoresist on the pattern-programmable UV micro-LED display.

Daisy Chain
As compared to the used bonding solder metals such as Sn, Sn-90 wt%Au, and Sn-A20 wt%Au, indium (In) is chosen as the bump material in this study due to its low melting temperature (about 157 C) and ductility. It can provide high-quality interconnection at room temperature and reduce the strain from mismatch of the thermal expansion coefficient (TEC) between the sapphire-based micro-LED and silicon-based integrated-circuit (IC) backplane. [29,30] The daisy chain structure was used to simulate the bonding between the sapphire-based micro-LED and silicon-based IC through the use of the flip-chip bonder SET FC150. Each daisy chain has high-density 960 Â 540 indium bumps with a pixel size of 5.5 μm and a pitch of 12.8 μm, and the entire daisy chain has 96 channels. Each channel contains 540 indium bumps. The daisy chain consists of the upper chip and bottom submount, the sizes of which were the same as those of actual 960 Â 540 micro-LED arrays and IC. The sapphire and silicon chips were chosen as the upper chip and bottom submount to simulate the bonded sapphire-based micro-LED and silicon-based IC, respectively. Ni/Au (30/300 nm) metal strips with a size of 22.8 Â 10 μm were then deposited onto the sapphire and silicon chips as the under bump metallization (UBM). [31] The Ni layer acts as an adhesion layer, diffusion barrier, and solder-wettable layer. Then the silicon oxide was deposited onto the sapphire and silicon chips as an insulator. The silicon oxide vias with a diameter of 3.5 μm were opened to expose the UBMs for the indium bump deposition. The diameter of the silicon oxide via should be smaller than that of the exposed UBM, or the indium bump will not ball up to increase its height. The opening diameters in the In bump coating for 960 Â 540 and 1920 Â 1080 arrays were 5.5 and 4 μm, respectively, which are slightly larger than that of the silicon oxide via. Afterward, the 4 μm thick indium bumps with a diameter of 5.5 μm (for 960 Â 540 array) or 4 μm (for 1920 Â 1080 array) were deposited onto the top of UBM. Therefore, when the indium bumps of the upper chip flip-chip bonded to the indium bumps of the bottom submounts, both the indium bumps were squeezed and they were soft enough to interconnect between the upper chip and bottom submount. Through the connection of indium bumps, metal strips of upper chip and bottom submount could form a long electrical path. Then, the optimizing bonding conditions were obtained by measuring the resistance of each channel. A higher bonding temperature will cause higher failure probability to short circuit between the micro-LED and IC due to the ductile indium bumps. A flipchip bonding process at low temperature and with a possibly lower force can be a potential solution. The optimum bonding conditions were obtained at a bonding temperature of 60 C, a bonding force of 245 N, and duration of 600 s. Finally, there were 25 channels successfully to be flip-chip bonded from the total 96 channels. The average resistance was calculated as 368 Ω, and thus the single indium bump has an average value of %67 mΩ by subtracting the pad resistance of UBM and then dividing the number of indium bumps from the remaining resistance. After the test of the bonding recipe by the daisy chain, the flip-chip bonding of the 960 Â 540 and 1920 Â 1080 UV micro-LED arrays to ICs was then processed. Figure 1a shows the linear current-voltage (I-V ) characteristics for a pixel size of 10 and 5 μm micro-LEDs. The inset of Figure 1a shows the logarithmic I-V characteristics. The 960 Â 540 micro-LED array has a vertical-shape mesa with a pixel size of 10 μm and a pixel pitch of 16 μm, while the 1920 Â 1080 micro-LED array has an inverted trapezoidal-shape mesa with a pixel size of 5 μm and a pixel pitch of 8 μm. The forward voltage (V F ) is calculated by considering the voltage at a driven current density of 22.2 A cm À2 , for example, the voltage at 20 mA for the LED with an active area of 300 Â 300 μm 2 . However, for the LED with a smaller size, it will lead to a lower current to drive the LED. Thus, the forward voltages of a single pixel of 960 Â 540 and 1920 Â 1080 micro-LED arrays are %3.35 and 3.29 V at the currents of 17.4 and 4.4 μA, respectively. In addition, the series resistances above 3 V and ideality factors in the forward bias of 2-3 V of a single pixel of the 960 Â 540 and 1920 Â 1080 micro-LEDs were calculated as 571 and 1755 Ω, and 2.2 and 2.3, respectively. Before passivation, the reverse currents at À10 V of a single pixel were 72 and 40 pA, respectively. In contrast, they had astonishingly small values of 19.5 and 9.4 pA at À10 V after passivation, respectively. Because the etched mesas have a SiO 2 layer passivated to the mesa sidewall by PECVD, the effects of damaged defects are effectively reduced. Thus, the leakage current decreases with the pixel size of the micro-LED. The calculated ideality factor and low reverse current mostly show the epitaxial device structure has a good quality and the etch process does not create too much damage. The significant difference of electrical characteristics between the 8 and 5 μm-pixel LEDs is the series resistance. Gong et al. reported that the dominant contribution to the total series resistance will be the resistance of the p-GaN current-spreading layer. They also concluded that the smaller the pixel, the higher the series resistance. [32] For the optical measurement system in this study, it is worth noting that the micro-LED array was in top emission (into air) during the optical measurement. However, the light-receiving integrating sphere was located behind the micro-LED array chip for probe station. The emitted light signal from the pixel traveled through the sapphire substrate and entered into the integrating sphere during the measurements. As such, the collected light output power by the integrating sphere must be much lower than the actual light output power emitted from a single pixel of the micro-LED array. Figure 1b shows the light output power and external quantum efficiency as a function of injected current for a single pixel of 960 Â 540 and 1920 Â 1080 micro-LEDs. The light output powers at 1 mA are 150 and 71 μW and the estimated highest external quantum efficiencies (EQEs) reach 5.5% and 3.7% at 150 A cm À2 for the 960 Â 540 and 1920 Â 1080 micro-LEDs, respectively. The estimated maximum wall-plug efficiency (WPE) occurs at about 5.4% at 51 A cm À2 of the 960 Â 540 micro-LED and 3.6% at 102 A cm À2 of the 1920 Â 1080 micro-LED. When the micro-LED size scales down, the sidewall perimeter/area ratio becomes larger, the defect density as the nonradiative recombination caused by dry etching increases and thus decreases the EQE. Meanwhile, the light output power and EQE also decrease due to its smaller pixel size. Figure 2a shows the electroluminescent (EL) spectra at different injection currents from 5 to 1000 μA (or from 6 Â 10 7 to 6 Â 10 9 μA cm À2 ) for a typical single pixel of 960 Â 540 and 1920 Â 1080 micro-LEDs. Figure 2b shows the peak wavelength and full width at half maximum (FWHM) as a function of injected current density for a single pixel of both the micro-LEDs. For the 960 Â 540 and 1920 Â 1080 micro-LEDs, the blueshifts in the EL peak wavelength of the micro-LEDs are 0.4 nm  www.advancedsciencenews.com www.adpr-journal.com from 369.95 to 369.55 and 0.8 nm from 370.1 to 369.3 nm with increase of the current density from 2 Â 10 7 to 2 Â 10 8 and from 6 Â 10 7 to 6 Â 10 8 μA cm À2 , respectively. A lower sensitivity to injected current for the smaller pixel size can be observed. With further increasing of the injection current, the EL peak wavelength becomes redshifted due to bandgap narrowing. There is a strong built-in electric field generated by the spontaneous and piezoelectric polarization effects in the multiple quantum wells (MQWs) of GaN-based LEDs, which would tilt the energy band, to result in the quantum-confined Stark effect (QCSE). [33] An increase of injection current leads to screening of the polarization electric field to some extent and thereby reduces the QCSE, and the peak wavelength appears blueshifted. With further increasing of the injection current, the thermal effect becomes significant in the LED, resulting in a redshift of the peak wavelength. The inset of Figure 2a shows the EL spectrum in the 450-700 nm range for the UV micro-LEDs. The UV micro-LED has a weak and broad visible green band emission at %550 nm, the EL intensity of which is three orders of magnitude weaker than that at 370 nm. This broad green emission band is attributed to yellow emission that is originated from the crystal defects. [34] Both the micro-LEDs almost keep the center wavelength at 370 nm, which is very close to that of the i-line (365 nm) UV light source standard for photolithography alignment. In contrast, both the 960 Â 540 and 1920 Â 1080 micro-LEDs have a similar trend and nearly FWHM values. The FWHM increases from 6.1 nm at 10 μA to 8.2 nm at 300 μA and then slowly increases with injected current density due to bandgap narrowing. [35] 2.3. 960 Â 540 and 1920 Â 1080 Micro-LED Displays and Maskless Photolithographic Application

Characteristics of 960 Â 540 and 1920 Â 1080 Micro-LEDs
The images are displayed from the bottom-emitting micro-LED arrays through the front-side sapphire substrate. After flip-chip bonding the micro-LED chip to IC, the pixel yield rate can be analyzed by the software image J, which is usually used to analyze full-bright images to figure out how many pixels or areas can be lightened. Figure 3a,b shows the analyzed images of the arrays bonding with IC by the software image J for the 960 Â 540 and 1920 Â 1080 micro-LED displays, respectively. The 960 Â 540 micro-LED array has the operability of %95.4%, which means the survival pixels after bonding are %494 346 or dead pixels are %24 054. The maximum light output power of this micro-LED display is %1.8 mW at 100 mA and 5 V. The used CMOS driver IC model SP70, designed by Jasper Display Corporation, has a limit of supply current of 100 mA and voltage of 5 V. Also, the operability of the 1920 Â 1080 micro-LED array is %80.9%, which means the survival pixels after bonding are %1 677 957 or dead pixels are %395 643. The maximum light output power of this micro-LED display is %2.6 mW at 100 mA and 5 V. Figure 4 shows an image of a cross-section of the bonded interface between pixels of the 960 Â 540 micro-LED array and indium bumps of IC observed by a scanning electron microscope (SEM). It is necessary to improve the wafer-level flip-chip process technology and chip processing because the pixel yield rate would be a huge issue in the future. Although the 370 nm is in the UV emission, which is invisible to human eyes, there is still some little violet and green emission observed in this UV micro-LED, as shown in the inset of Figure 2a. Figure 5a-d shows pictures of the 370 nm 960 Â 540 and 1920 Â 1080 matrix-addressable micro-LED displays, respectively, which are also able to deliver video images (see the Supporting Information). Both the 370 nm micro-LED displays were connected to a flexible printed circuit assembly (FPCA) operated at 250 mA and 2.7 V, near the forward voltage. The picture of the 1920 Â 1080 micro-LED display is much clearer than that of the 960 Â 540 micro-LED display because the former has a higher resolution and a higher light output power of 2.6 mW than the latter of a lower resolution and 1.8 mW at the same driving current and voltage. To our knowledge, this is the first  For the maskless photolithographic application, the negative resist was spin coated onto a Si wafer, and then was soft baked with 150 C, 150 s. "NTHU" (the abbreviation for National Tsing Hua University) in mirror writing was first pattern programmed on the1920 Â 1080 micro-LED display. Then the resist-coated Si wafer was covered face-to-face onto the UV micro-LED display by direct contacting. With exposure for 200 s and postexposure baking at 100 C and 150 s, the resist-coated Si wafer was then developed for 7 s. Figure 6a,b shows that the NTHU pattern appeared on the resist-coated Si wafer and the pattern with shown scale, respectively. An inspection of Figure 5 reveals that the line width appeared on the resist-coated Si wafer is not very fine because  there is no related lens to focus the light emitted from the micro-LED display onto the resist, as compared to the actual photolithographic system. The light emitted out of the micro-LED display is scattered in the air gap between the micro-LED display and resist-coated Si wafer. By using a related lens and focusing system, maskless photolithography by the UV micro-LED display as the light source can be feasible and more potential to achieve a smaller line width, which is determined by the pixel size. Such a maskless lithography system with a fine pixel size would provide the advantages of reduction of time and cost to make the photomask in the future semiconductor industry.

Experimental Section
The 960 Â 540 micro-LED display was fabricated with a pixel size of 8 μm and a pixel pitch of 12.8 μm within a diagonal length of 0.55 in., reaching the PPI value of 2000. The fabrication process of the 960 Â 540 UV micro-LED is introduced in brief as follows. 1) A 70 nm indium tin oxide (ITO) was deposited by RF sputter onto InGaN/GaN UV LED wafer as the Ohmic contact layer of top p-type GaN and an 80 nm Ni layer was then deposited by e-beam evaporation as the dry-etching hard mask. 2) The pixels were etched with a vertical sidewall structure by inductively coupled plasma-reactive ion etch (ICP-RIE) afterward. The dry etching conditions were at a bias power of 10 W, a Cl 2 flow rate of 50 sccm, an ICP power of 200 W, a pressure of 0.5 Pa, an ambient temperature of 20 C, and an etching time of 8 min.
3) The common cathode and pixel anode of 30/120/40/60 nm Ti/Al/Ti/Au directly were deposited on the chip, followed by annealing at 550 C for 300 s under nitrogen ambient. Figure 7a-c shows the SEM images with different magnification factors for the fabricated 960 Â 540 micro-LED array with vertical pixels. 4) To reduce the leakage current, a 300 nm SiO 2 passivation layer was then coated onto the mesa sidewall by PECVD. 5) 4 μm thick indium bumps were deposited on the pixels to hybridize the micro-LED array on CMOS active matrix model JD 2702 from Jasper Display Corporation and then through the reflow process. 6) The microdisplay assembly was formed by a flip-chip bonding process using a SET FC150 bonder, which had the AE0.5 μm placement accuracy and AE1 μm postbond accuracy. The used force ramp and the temperature ramp were 0.25 kg s À1 and 8.3 C s À1 , respectively. In the soak segment, the force and the  The 1920 Â 1080 micro-LED display was fabricated with a pixel size of 5 μm and a pixel pitch of 8 μm within a diagonal length of 0.69 in., reaching the high PPI value of 3200. The fabrication process of the 1920 Â 1080 micro-LED array was similar to that reported previously. However, as the pixel size scales down, there are disadvantages of the vertical sidewall structure that appear in the aforementioned fabrication of the 960 Â 540 UV micro-LED. The control of the wet etching of the ITO film is difficult and the grid-electrode lithographic process becomes a challenge due to the fine pattern of the 1920 Â 1080 array. To fabricate a high-resolution microdisplay with such a precise pattern, a novel self-aligned technology was developed to etch the pixel as an inverted trapezoidal-shape mesa. With this mesa structure, both the problems of the lithographic process (n-and p-metal depositions) and ITO wet etching can be solved. The shape of the cross-sectional profile of the mesas was in upside-down trapezoid, which was also etched by ICP-RIE with the parameters of a bias power of 400 W, a Cl 2 flow rate of 150 sccm, an ICP power of 10 W, a pressure of 10 Pa, an ambient temperature of 60 C, and an etching time of 12 min. Figure 8a-c shows the SEM images with different magnification factors for the fabricated 1920 Â 1080 array with the inverted trapezoidal pixels, whose sidewall tilts at around a 65 angle. The structure makes the metals not connect between the top of the pixels and the n-GaN region, efficiently screening the sidewall from the deposited metals, as shown in Figure 7. Because of the self-aligned technology, the common cathode and pixel anode of Ti/Al/Ti/Au directly were deposited onto the chip without any lithographic process onto the n-GaN region and pixel region in step (4), respectively. The self-aligned process allows the fabrication to complete efficiently on such a small-size device, greatly improving the alignment precision and uniformity.
The light-current characteristics (L-I) and EL emission spectra were measured by a CAS 140D from Instrument Systems placed on the sapphire side for a single pixel of the micro-LED.
To accomplish the potential application of maskless photolithography, it is necessary to prepare the resist-coated Si wafer. The silicon chip was first spin coated with the negative resist NR9-1500PY, and then soft baked at 150 C and 150 s. The micro-LED display was first to display the image with the word pattern. The prepared resist-coated Si chip was then covered to the micro-LED display with face to face and exposed for 200 s. Afterward, the Si chip was postexposure baked with 100 C and 150 s and was developed with DPD 200 for 7 s to show the patternprogrammable image from the UV micro-LED display.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.