Independent Band Modulation in 2D van der Waals Heterostructures via a Novel Device Architecture

Abstract Benefiting from the technique of vertically stacking 2D layered materials (2DLMs), an advanced novel device architecture based on a top‐gated MoS2/WSe2 van der Waals (vdWs) heterostructure is designed. By adopting a self‐aligned metal screening layer (Pd) to the WSe2 channel, a fixed p‐doped state of the WSe2 as well as an independent doping control of the MoS2 channel can be achieved, thus guaranteeing an effective energy‐band offset modulation and large through current. In such a device, under specific top‐gate voltages, a sharp PN junction forms at the edge of the Pd layer and can be effectively manipulated. By varying top‐gate voltages, the device can be operated under both quasi‐Esaki diode and unipolar‐Zener diode modes with tunable current modulations. A maximum gate‐coupling efficiency as high as ≈90% and a subthreshold swing smaller than 60 mV dec−1 can be achieved under the band‐to‐band tunneling regime. The superiority of the proposed device architecture is also confirmed by comparison with a traditional heterostructure device. This work demonstrates the feasibility of a new device structure based on vdWs heterostructures and its potential in future low‐power electronic and optoelectronic device applications.

The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/advs.201800237. DOI: 10.1002/advs.201800237 electronic devices. Recently, considerable research interest has been intrigued by the vertically stacked vdWs integration of various 2DLMs, which provides infinite possibilities by overcoming the limitation of lattice matching and processing compatibility. [6][7][8][9][10][11][12][13][14] Among various categories of vertically stacked vdWs heterostructured devices, the tunneling field effect transistor (TFET), which provides a promising sub-60-mV dec −1 subthreshold swing (SS), has been regarded as a promising application of vdWs heterostructure for future energy-efficient electronics. [15][16][17][18][19] An effective gate control is crucial for the band alignment modulation in a TFET. Such a control capability is qualitatively correlated with the parameter called "natural length scale λ," and hence requires an ultrathin thickness of channel materials. [20] For bulk semiconductors (such as silicon, germanium, and III-V semiconductors), the quantum effects (such as bandgap variation and transconductance oscillation [21] ) arise when thickness scales down to several nanometers, thus degrading the corresponding device performance. [22] The band-edge steepness at the heterojunction interface also plays an important role in obtaining devices with high switch steepness. [23] Several factors affect the band-edge steepness, including interfacial trap states, lattice mismatch, rough thickness, and doped atoms. In the case of ideal 2DLM heterostructures, the nature of atomic flatness and perfect surfaces enables the formation of atomically sharp interfaces without lattice mismatch, interface defects, and dangling bonds. Hence, the band-edge steepness can, in principle, benefit from such high quality interfaces and it endows an abrupt tuning ability of density of states (DOS) at the band edge. Additional voltage potential dropped across the van de Waals gap [24] also results in more effective modulation of band offset at the tunneling interface.
Consequently, significant efforts have been devoted to fabricating vertical stacked TFETs using different 2DLMs, such as graphene, hexagonal boron nitride (BN), and transition metal dichalcogenides (TMDs). Resonate tunneling current and negative differential resistance (NDR) have been observed in graphenebased heterostructure TFETs, including monolayer and bilayer graphene separated by BN [25][26][27][28][29][30] or TMDs. [6,31] However, due to the absence of a bandgap, graphene-based TFETs are unable to obtain a high on/off ratio of the current. TMD-based TFET devices have also been experimentally demonstrated, including Benefiting from the technique of vertically stacking 2D layered materials (2DLMs), an advanced novel device architecture based on a top-gated MoS 2 / WSe 2 van der Waals (vdWs) heterostructure is designed. By adopting a selfaligned metal screening layer (Pd) to the WSe 2 channel, a fixed p-doped state of the WSe 2 as well as an independent doping control of the MoS 2 channel can be achieved, thus guaranteeing an effective energy-band offset modulation and large through current. In such a device, under specific top-gate voltages, a sharp PN junction forms at the edge of the Pd layer and can be effectively manipulated. By varying top-gate voltages, the device can be operated under both quasi-Esaki diode and unipolar-Zener diode modes with tunable current modulations. A maximum gate-coupling efficiency as high as ≈90% and a subthreshold swing smaller than 60 mV dec −1 can be achieved under the band-to-band tunneling regime. The superiority of the proposed device architecture is also confirmed by comparison with a traditional heterostructure device. This work demonstrates the feasibility of a new device structure based on vdWs heterostructures and its potential in future low-power electronic and optoelectronic device applications.

Introduction
One-or few-atom-thick 2D layered materials (2DLMs), formed by lateral covalent bonds and vertical van der Waals (vdWs) forces, exhibit extraordinary electronic and optical properties [1][2][3][4][5] and are therefore considered building blocks of next-generation MoS 2 /WSe 2 , [24,32,33] MoS 2 /BP, [34,35] SnSe 2 /BP, [36] SnSe 2 /WSe 2 , [37] and ReS 2 /BP. [35] In these devices, gate-tunable tunneling current governed by the band-to-band tunneling (BTBT) mechanism can be observed through electrostatic gating of energy-band alignment and carrier density under specific device architectures. However, in the previously reported vertically stacked TFET devices, the gate electrical field is applied to both components of the heterostructure and thus modulates their band alignment simultaneously. Therefore, either an n-or p-type 2DLM is under a depletion state when the device is turned on, which inevitably increases channel series resistance and limits the through current. In order to suppress the series resistance, recently, another self-align method is proposed to fabricate short-channel vdWs heterostructure device. [38] It is also inefficient to modulate the band offset unless a more complicated architecture is used (e.g., dual-gate structure [24] ) or the gate-control capability is drastically enhanced (e.g., by applying a thin, high-k dielectric [24] or ionic electrolyte [34,39] ). Moreover, in a vertically stacked 2DLM heterostructure, the energyband offset is mainly determined by the potential drop across the vdWs gap at the interface within the overlap region, and is difficult to be modulated directly by gate electrical field due to the screening effect associated with this vertically stacked structure.
Hence, in this paper, we design a novel top-gated MoS 2 /WSe 2 vdWs heterostructure by inserting a self-aligned metal screening layer (Pd) on top of the WSe 2 portion, which gives rise to a constant highly p-doped state of the WSe 2 while the independent energy-band manipulation of the MoS 2 can also be achieved. In such a device, a sharp PN junction forms at the border of the overlapped region and can be modulated efficiently by the gate electrical field. Under specific drain bias voltage V D , the device can be operated as a rectifier or BTBT diode, and gate modulation of drain current can be achieved in both operation modes. In the BTBT mode, high on/off ratio (>10 6 ), high gate-coupling efficiency (as high as 90%), and a small subthreshold wing (≈52 mV dec − 1 ) are obtained, indicative of efficient gate control on the MoS 2 channel and effective electrical-field screening on the WSe 2 portion. We also compare the proposed new device architecture with a traditional heterostructure device to verify the superiority of its architecture. At low temperature, we also observe a novel gate-dependent current fluctuation, which can be explained by the alternation of two different BTBT processes.

Device Structure and Fabrication
The fabrication process and cross-sectional structure of the proposed MoS 2 /WSe 2 device are schematically shown in Figure 1a (also see Experimental Section). Compared to a Adv. Sci. 2018, 5, 1800237 traditional heterostructure device, the main difference is the self-aligned metal film (Pd in the proposed device) inserted between the HfO 2 dielectric and the WSe 2 sheet, which acts as contact and screening layer to the WSe 2 portion, as shown by the high-resolution transmission electron microscopy (HRTEM) images in Figure 1b,c, where a sharp edge at the Pd/ WSe 2 end can be clearly identified. Here, several reasons are considered for employing such screening metal film: 1) the Pd metal with large work function can completely deplete the electrons in the ultrathin WSe 2 , which consequently pulls down the Fermi level and further keeps the WSe 2 a consistent p-doped state. By gating the channel material (MoS 2 ) only, it ensures an efficient modulation of energy-band offset for such heterostructure. 2) Such structure enables the scale-down of the TFET channel length, because one of the components (e.g., WSe 2 in the proposed device) is totally covered under the screening metal film, which suggests that the device channel length is the same as in regular 2DLM-FETs. Furthermore, to eliminate the Fermi pinning effect at the MoS 2 -metal interface, the contact of the proposed device can be improved by transferring graphene onto the MoS 2 end, which improves contact resistance and enables more flexible modulation of the MoS 2 energy band by the gate electrical field.

Results and Discussion
First, the MoS 2 /WSe 2 heterojunction devices were electrically characterized using a probe station (Cascade SUMMIT 11000B-M) at room temperature. Figure 2a shows typical gatedependent output characteristics (I D -V D ) with gate voltage V G varied from −6 to 5 V in steps of 1 V. The different diode regimes can be observed by tuning V G . First, an obvious bipolar characteristic can be observed at V G = 5 V (the upper graph of Figure 2b), which can be classified as a quasi-Esaki-diode (QED). It is indicative of the formation of a well-stacked, highly doped p-n junction with a broken-gap band offset (type-III band alignment). In the proposed device architecture, the additional Pd film not only acts as a screening layer, but also as the contact metal that induces p-doping of the WSe 2 portion. Meanwhile, the positive V G can effectively tune the MoS 2 into an n-doped state. Compared to a traditional Esaki diode, no obvious NDR effect is observed under forward bias, but with a trend as shown in the circled region in Figure 2a. We attribute this discrepancy to the traps in the WSe 2 (tungsten or selenium vacancies) induced mainly by the etching process during device fabrication, which has also been previously reported in the WSe 2 -graphene heterostructures. [40] These acceptor-like  traps [41] provide an additional current component that is proportional to forward bias, through trap-assisted tunneling. Second, when a negative V G is applied (V G = −2 V in the lower graph of Figure 2b), the minority carrier diffusion current under the forward bias V D can be effectively suppressed, while a reverse tunneling current remains, showing a strongly rectified characteristic. Although the underlying transport mechanism is different, the measured I-V characteristics resemble the behavior of a unipolar Zener diode (UZD), which can be hardly observed in a single-gated PN-junction structure.
The reverse-to-forward drain current ratio (|I r |/|I f |, i.e., the rectified ratio) is then extracted from the fixed V D = ±1.5 V, as shown in Figure 2c (result from a separate device is also added). The two operation regimes can be clearly identified, and the transition occurs at approximately V G = −2 V, which also agrees with the n-doped nature of MoS 2 . Such behavior can be quantitatively illustrated by the energy-band diagram shown in Figure 2d. As the WSe 2 is totally covered by Pd metal, only the graphene-MoS 2 portion can be effectively modulated via the gate electrical field. For the QED mode (V G > 0), four components contribute to the current at a forward V D : BTBT current (J BTBT ), trap-assisted tunneling current (J TAT ), thermal emission current (J Ther ), and interlayer recombination current (J Re ). Although the occurring of J Re is common in vdWs heterostructures due to strong Coulomb interaction, [24,42,43] the magnitude of J Re is negligible compared with the total current I D under small positive V D . [43] With a negative V D , in contrast, the current is mainly contributed by J BTBT . Under the UZD mode (V G < 0) with a positive V D , electron diffusion current from graphene to MoS 2 (J G-M ) is suppressed by a large Schottky-barrier at the MoS 2 -graphene interface as MoS 2 has been depleted by negative V G , similar to the OFF state in a graphene-MoS 2 -graphene transistor. [24] The depleted state of MoS 2 also suppresses J Re as J Re ∝n·p. The energy barrier at the MoS 2 -WSe 2 interface blocks the hole diffusion path from the WSe 2 portion due to the large bandgap of MoS 2 . Such transport mechanism can also be confirmed from n-doping nature of MoS 2 -graphene barristor [43] where the p-branch is not observed. For a negative V D , the lifted MoS 2 band requires a larger reserve bias to turn on the BTBT current.
We next examine the gate-coupling efficiency of the proposed device to evaluate its gate-control capability on relative band alignment between MoS 2 and WSe 2 , which can be conveniently elucidated by the tunneling onset voltage V ON (extracted from the I D -V D curves and defined as the tunneling onset voltage V ON at which the corresponding drain current I D approaches 100 pA). The extracted V ON versus V G curves are shown in Figure 3a. The nonlinear V ON -V G curve indicates that the gate-control capability can be enhanced by this novel device architecture, and only depends on the MoS 2 channel. The slope of V ON -V G represents the efficiency of the gate-induced band shift between MoS 2 and WSe 2 , and is thus defined as gate-coupling efficiency η, [24] which is noted by red points in Figure 3a. It is as high as 90% and comparable to that of dual-gate architecture. [24] We expect that the η could be further improved by employing thinner high-k dielectrics. At larger V G , the electron screening effect, a result of the large DOS at the MoS 2 conduction-band edge, is the main reason for the saturation of V ON . This is also a proof of achieving independent manipulation of the MoS 2 energy band, since such a saturation tendency has not yet been reported in traditional vdWs heterostructure devices, because in regular devices, the gate-induced electrical field acts on both of the stacked materials, as discussed above.  portion is fully depleted while WSe 2 maintains p-doped, which can be regarded as an I-P junction. In this regime, I D is below the noise level of our measurement setup. Upon increasing V G , electrons tend to accumulate in the MoS 2 channel, resulting in an enhancement of I D (denoted as J Ther in Figure 3b) which is the same as the subthreshold regime of a regular MoS 2 FET. When the V G continues to increase, an obvious current fluctuation is observed. This is mainly due to a higher energy barrier results from enhanced built-in electrical field between MoS 2 and WSe 2 , thus diminishing I D . By further applying a larger V G , the Fermi level shifts closer to the conduction-band edge of MoS 2 , resembling an n + /p + diode, and the BTBT window is now opened for electrons to tunnel from the MoS 2 conduction band to the WSe 2 valence band.
In order to demonstrate the feasibility of the proposed device working as a TFET, we also measure its transfer characteristics under negative V D . The best performance from a separate device is plotted in Figure 3c with different V D values. A sharp switching of I D is observed, and the on/off ratio of the device exceeds 10 4 . The SS of the heterojunction device is calculated according to SS = dV G /d (log I D ). A low SS of 52 mV dec −1 was obtained and maintained sub 60 mV dec −1 for two decades of I D from 10 −10 to 10 −8 . This is, to the best of our knowledge, the first time a sub-60-mV dec −1 SS has been observed in MoS 2 / WSe 2 heterostructures. Furthermore, we expect to achieve a higher ON current and a smaller SS over a larger current range in our future devices, by utilizing thinner high-k dielectrics, further eliminating the resist contamination during the flake transfer to reduce the trap density at MoS 2 /HfO 2 interface, or improving the contact at the MoS 2 side.
In order to verify the superiority of our proposed device structure (type-II), a control experiment was carried to compare the different device structures. The traditional device without a screening layer (type-I) is schematically shown in Figure 4a. To fabricate this type of device, we also confine the top-gate electrode to cover the overlap region of MoS 2 /WSe 2 heterostructure for the convenience of subsequent comparison and modeling. The output characteristics of the type-I device are shown in Figure 4b. Apparently, its gate dependence under a negative V D is better than that of forward V D because the Au-MoS 2 interface has a larger Schottky barrier (under positive V D , electrons are injected from Au to MoS 2 ), which leads to a lower injection current. More importantly, the BTBT onset voltage V ON is independent of V G , indicating a weak gate-control capability of the relative band alignment for MoS 2 /WSe 2 , which also confirms the advantage of the type-II device structure. Results from a simple model also support the experimental comparison results (details are discussed in the Supplementary Information). For two types of devices, the shifts of the MoS 2 conduction band and the WSe 2 valence band under different V G values are shown in Figure 4c,d, respectively. In the type-I device, MoS 2 and WSe 2 follow the same trend, and the relative band alignment is almost independent of V G , in agreement with the observed constant V ON ; In the type-II device, the WSe 2 potential is pinned by the metallic screening layer, and thus the relative band alignment can be effectively modulated by V G , which agrees with the above experimental results.
To obtain a more comprehensive understanding of the proposed heterostructure device, the temperature dependence  of the output characteristics is also investigated. Figure 5a plots the temperature-dependent I D -V D characteristics with V G = −9 V, at T between 77 and 250 K. Figure 5b shows that V ON is positively correlated with T. The extracted coefficient of 1.29 mV K −1 is also similar to the previous result. [24] We then compare the datasets in Figure 5a with conventional thermal emission theory, which can be described by where φ B is the effective Schottky-barrier height, A is the Richardson's constant, k B is the Boltzmann's constant, and q is the electronic charge. An adequate fit to this equation can be obtained in Figure 5c, which shows an Arrhenius plot of I D /T 2 versus 1/T for different V G values. The Schottky-barrier height φ B between MoS 2 and WSe 2 is then extracted and shown in Figure 5d. A clear transition of φ B from 30 to 5 meV corresponds to the transition from the thermal-emission-dominated regime (J Ther ) to the BTBT-dominated regime (J BTBT ), since the BTBT tunneling current contributes an additional current component that is not included in Equation (1). This also agrees with the underlying transport mechanism of the current fluctuation shown in Figure 3b. At relatively low temperature (from 77 to 200 K), we observe an unexpected "kink" signature in I D -V G under negative V D , as shown in Figure 6a. Both "kink" signatures and V ON shift by varying V D . At higher T (>200 K), this phenomenon disappeared, as discussed in the Supplementary Information.
Such an effect can be attributed to the combination of two BTBT processes: 1) BTBT from the WSe 2 valence band to the MoS 2 conduction band, and 2) BTBT occurring inside the MoS 2 channel, since part of the MoS 2 is screened by the palladium film. [44] We define three different operation regions (I, II, and III) with corresponding band diagrams (Figure 6b-d) to further elucidate the underlying transport mechanism in each operation region. For large negative V G in region I, both electron and hole diffusion currents are suppressed by energy barriers, showing an OFF state. In this region, the electrical field at the heterostructure region can rapidly pull out thermally excited electrons in the MoS 2 conduction band and holes in the WSe 2 valence band, to form a generation current (noted by J Ge in Figure 6b). In region II, the MoS 2 -conduction band can be pulled below the WSe 2 valence band by V G to form a BTBT window. In this case, the current is dominated by BTBT current from WSe 2 to MoS 2 (denoted J W-M in Figure 6c,d), and soon reaches saturation near the "kink" point as shown in Figure 6a. The BTBT current is positively proportional to applied V D as the BTBT window can be enlarged by increasing the bias voltage, which can be quantitatively described by [45] 2 where α is the screening factor, q is the DOS and Fermi-Dirac distribution functions of MoS 2 and WSe 2 , respectively. Equation (2) illustrates why the position of the "kink" feature shifts along with V D . If we continuously increase V G , the further relative band shift results in extra electrons in the BTBT current from the valence band of MoS 2 underneath WSe 2 (pinned by the screening layer) to the conduction band of MoS 2 modulated by the top gate, as shown in Figure 6d and denoted as J M-M . Therefore, a second enhancement of current is observed in region III. As the bandgap of MoS 2 is larger than that of WSe 2 , the WSe 2 /MoS 2 BTBT current appears prior to the MoS 2 /MoS 2 BTBT current. Thus, we can observe the transition from WSe 2 /MoS 2 BTBT current to MoS 2 / MoS 2 BTBT current.

Conclusion
In summary, we have successfully demonstrated that a topgated MoS 2 /WSe 2 vdWs heterostructure can be improved by inserting an extra self-aligned metal film on top of the WSe 2 portion as a screening layer. By tuning the bias voltage, this proposed device can be operated as a QED and UZD with obvious gate-controlled current and on/off ratio. Under the BTBT regime, a 90% gate-coupling efficiency, as well as a small SS (≈ 52 mV dec − 1 over two decades), is obtained owing to the effective and independent gate modulation on energy band and carrier density of the MoS 2 . By comparing with a traditional heterostructure, the superiority of the proposed device architecture is confirmed. At low temperature, a current fluctuation under negative V D is also observed, and can be qualitatively explained by the alternation between WSe 2 /MoS 2 BTBT current and MoS 2 /MoS 2 BTBT current. Our proposed device architecture is versatile and can be conveniently applied in other 2DLMbased heterostructures, and thus it is instrumental in designing future electronic and optoelectronic device applications.

Experimental Section
The WSe 2 flake was first peeled onto the SiO 2 (300 nm)/Si substrate by a mechanical exfoliation method. Electron-beam lithography (EBL) was used to expose an area within the WSe 2 flake (the area was slightly smaller than the flake itself), followed by 50-nm Pd deposition using E-beam evaporation. The self-aligned dry etching was then performed using plasma etching (Ar gas, 40 sccm, 500 W) to obtain a sharp edge, which was the key to obtaining a working device. During the etching process, the Pd film was used as the protection layer and the rest of WSe 2 was completely removed. Then, a dry transfer method [46] was applied to transfer the Pd/WSe 2 stack onto a MoS 2 flake, which was pre-deposited onto the SiO 2 (300 nm)/Si substrate, to form a MoS 2 / WSe 2 heterostructure. To improve the electrical contact at the MoS 2 side, a graphene flake was attached to the MoS 2 portion by the same dry transfer method. The source-drain electrodes were then defined by EBL followed by metal deposition (5 nm/50 nm Ti/Au). For the topgate dielectric, a 1-nm-thick layer of yttrium was thermally evaporated and then naturally oxidized in ambient air as a seeding layer for the following atomic layer deposition of high-k HfO 2 (50 nm) at 300 °C. Finally, a Ti/Au (5 nm/50 nm) layer was deposited as the top-gate electrode.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.