High On/Off Ratio Spintronic Multi‐Level Memory Unit for Deep Neural Network

Abstract Spintronic devices are considered as one of the most promising technologies for non‐volatile memory and computing. However, two crucial drawbacks, that is, lack of intrinsic multi‐level operation and low on/off ratio, greatly hinder their further application for advanced computing concepts, such as deep neural network (DNN) accelerator. In this paper, a spintronic multi‐level memory unit with high on/off ratio is proposed by integrating several series‐connected magnetic tunnel junctions (MTJs) with perpendicular magnetic anisotropy (PMA) and a Schottky diode in parallel. Due to the rectification effect on the PMA MTJ, an on/off ratio over 100, two orders of magnitude higher than intrinsic values, is obtained under proper proportion of alternating current and direct current. Multiple resistance states are stably achieved and can be reconfigured by spin transfer torque effect. A computing‐in‐memory architecture based DNN accelerator for image classification with the experimental parameters of this proposal to evidence its application potential is also evaluated. This work can satisfy the rigorous requirements of DNN for memory unit and promote the development of high‐accuracy and robust artificial intelligence applications.


S1. Basic properties of discrete components
We measure the basic properties of discrete components, i.e., magnetic tunnel junction (MTJ) and Schottky diode, which can help to understand the working mechanism of our multilevel memory unit (MLMU). Fig. S1 (a)   The I-V curve for P state is nearly linear while the I-V curve for AP state is significantly nonlinear, but there is no obvious rectification effect observed in either state. The I-V curve can be well described by a cubic equation [1] , where A1 and A2 depend on the height and thickness of the tunnel barrier. By numerically fitting the I-V curves of MTJ, we can get A1 and A2 under P and AP states. As plotted in the inset of Fig. S1 (c), with increasing applied current, the TMR ratio decreases from 0.9 to 0.7 owing to the inelastic scattering induced by magnon excitation [2] . Here, the TMR ratio is defined as is the voltage detected in AP (P) state. We also measure the I-V curve of Schottky diode as shown in Fig. S1 (d), where obvious rectification behavior with a forward opening voltage (VFO) and a reversed breakdown voltage (VRB) is observed. The inset plots the positive branch of I-V curve, which can be well described by the following exponential equation [3] , where Is represents the reverse saturation current and α = nk B T q . Here, n is the ideality factor and T represents temperature. By numerically fitting the I-V curve of diode, we can get and I s . diode. The total current flowing through the combined device can be described as,

S2. Physical model and enhancement mechanism of on/off ratio
Meanwhile, the real time current applied to the combined device is where I1, I2 and f represents AC amplitude, DC offset and AC frequency, respectively. Fig. S2 (b) illustrates the schematic of the AC with DC offset. The measured rectification voltage represents the average value (V ̅ ) of the corresponding real time voltage V(t) over the period T of the applied AC current:

S3. 3-State memory unit
Through changing the number of MTJs, different resistance states can be achieved. We also exhibit the working mode of the 3-state memory unit including data writing based on STT effect and data reading with high on/off ratio. As demonstrated in Fig. S4, multi-level rectification voltage under AC = 3 μA and DC = 0.14 μA corresponding the resistance states are stably detected when each MTJ is respectively switched from P state to AP state by locally applying a voltage pulse of 0.5 V to the corresponding electrodes.

S4. Crossbar array integration scheme of MLMU
For practical application, the proposed MLMU composed of series MTJs and a diode should be integrated in a crossbar array structure. Fig. S5 shows the designed crossbar array.
The basic reading/writing operations are described as below.
On the one hand, through charging the selected bit line (BL) and word line ( which has been verified by several works [4,5] . In addition, an inverter can also be used to convert the voltage to the time domain, thereby completing the identification of the voltage signal with the advantages of high-speed and reliability [6] .

S5. Integration density discussion
Considering that multiple MTJs are used to realize multi-level resistance states in our work, its integration density and improvement potential should be discussed, which is critical for practical application.
At first, the integration density of our proposed spintronic MLMU is comparable with that of magnetic random access memory (MRAM). To realize high-density integration, a crossbar array composed of large amounts of MLMUs is constructed as shown in Fig. S5. In this design scheme, a basic structure of 1 transistor and 1 MTJ is utilized. Therefore, the integration density of our scheme is compatible with that of MRAM. We can increase the numbers of resistance