High‐Density Artificial Synapse Array Consisting of Homogeneous Electrolyte‐Gated Transistors

Abstract The artificial synapse array with an electrolyte‐gated transistor (EGT) as an array unit presents considerable potential for neuromorphic computation. However, the integration of EGTs faces the drawback of the conflict between the polymer electrolytes and photo‐lithography. This study presents a scheme based on a lateral‐gate structure to realize high‐density integration of EGTs and proposes the integration of 100 × 100 EGTs into a 2.5 × 2.5 cm2 glass, with a unit density of up to 1600 devices cm−2. Furthermore, an electrolyte framework is developed to enhance the array performance, with ionic conductivity of up to 2.87 × 10−3 S cm−1 owing to the porosity of zeolitic imidazolate frameworks‐67. The artificial synapse array realizes image processing functions, and exhibits high performance and homogeneity. The handwriting recognition accuracy of a representative device reaches 92.80%, with the standard deviation of all the devices being limited to 9.69%. The integrated array and its high performance demonstrate the feasibility of the scheme and provide a solid reference for the integration of EGTs.


Measurement of the long-term potential and depression circles and relevant data process
A single long-term potential and long-term depression circle was obtained where successive 60 pulsed VG of 3 V, 10 Hz, and 50 ms were applied on the gate and then successive 60 pulsed VG of −3 V, 10 Hz, and 50 ms were applied.Multiple circles were obtained by repeating the same process.Then, the row data of several circles were extracted and all troughs of each circle were found and recorded as the conductance states of the synapse transistor.The conductance states and matched pulse numbers were normalized and then fitted using the equation mentioned in the main text.Then, the normalized Ap,d was matched with the nonlinearity table provided by Prof. Shimeng Yu.Subsequently, the CTCs of the multiple circles were calculated. 1

Figure S1
Photo-lithography layout of the entire array (a) and a single unit (b).In the single unit, the vertical grid lines are the gate electrodes, and the horizontal grid lines are the drain and source electrodes.These parallel and perpendicular electrode grid lines connect devices located at different rows and columns and simultaneously send pulse signals to realize the writing and reading actions.Three electrode lines are expanded from the connection grid lines, which are the horizontal gate, relevantly thinner vertical drain, and source of a single synapse transistor.Between the drain and source is a channel with a wide-length ratio of 20 μm:20 μm.The gate is aligned centrally with the channel, and its edge maintains a distance from channel of 12 μm.

Figure S11 Relative variation of EPSCs caused by pulses with different frequency.
Curve of( 5 −  1 )/ 1 , where A1 and A5 represent the amplitude of the first and last induced EPSC, respectively.Frequency increases with increasing EPSC.The relative variation could be considered a criterion of frequency as the last EPSC increases with increasing frequency.High-pass filter can be obtained by setting a threshold of relative variation and determining whether the input signal is of high enough frequency.

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Figure S2 ID-VG curves of devices with various PVP concentration.

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Figure S5 ID-VG test on device with pure PEO and PEO/PVP/LiTFSI/MOF-67 as electrolyte.The ID-VG curve of device with pure PEO showed a typical transfer characteristic though relevant parameters such as on-off ratio and the hysteresis were not ideal due to the poor ionic conductivity of the PEO matrix.

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Figure S6Transfer curves of devices in two batches with various electrolyte thickness.The thickness of electrolyte was controlled through drop-cast specific amount (200 μL, 300 μL, 400 μL, 500 μL) of electrolyte on the EGTs area(of 2.5 cm * 2.5 cm).A series of transfer curves of devices(including two batches, each batch contained eight EGTs) with various electrolyte thickness(200 μL, 300 μL, 400 μL and 500 μL) were shown.The thickness and batch were noted in legend as "thickness-batch".The transfer curves showed similar characteristics(including subthreshold swing of 0.266 V/dec with standard deviation of 0.021 V/dec and threshold voltage of 0.030 V with standard deviation of 0.030 V.No evident deviation was observed.

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Figure S7 Subthreshold swing distribution of devices in two batches with various electrolyte thickness.The mean subthreshold swing is 0.266 V/dec with standard deviation of 0.021 V/dec.

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Figure S8 Threshold voltage distribution of devices in two batches with various electrolyte thickness.The mean threshold voltage of 0.030 V with standard deviation of 0.030 V.

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Figure S9 Basic EPSC characteristic.(a)Schematic of biological synapse.EPSC stimulated with different pulse amplitudes (b), amounts (c), and width (d).Except for the specific parameter, the base parameter has an amplitude of +3 V and a pulse width of 150 ms.

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Figure S12 Long-term potential process mimicked by device with various PVP concentration.The stimulus are pulses with amplitude of 3 V, width of 50 ms, frequency of 10 Hz.

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Figure S13 Typical training process simulation.