Design‐Dependent Switching Mechanisms of Schottky‐Barrier‐Modulated Memristors based on 2D Semiconductor

For Schottky barrier‐modulated memristors based on 2D semiconductors, it has, to date, not been possible to achieve control over defect type and concentration as the measured switching characteristics vary considerably even under similar fabrication conditions. In this work, four distinct types of memristors are identified based on the combination of low and high resistance sequences, as well as volatile and nonvolatile characteristics. All these four types of memristors were previously observed experimentally by different research labs. It is found that the specific behavior of each memristor type can be explained by the Schottky barrier height modulation and current rectification arising from the concerted effects of the concentration, charge polarity and mobility of defects. The conditions required to realize the four types of 2D semiconductor‐based memristors are analyzed and design guidelines for fabricating each of these four types of memristors are provided.


Design-Dependent Switching Mechanisms of Schottky-Barrier-Modulated Memristors based on 2D Semiconductor
Hangbo Zhou,* Viacheslav Sorkin, Shuai Chen, ZhiGen Yu, Kah-Wee Ang,* and Yong-Wei Zhang* DOI: 10.1002/aelm.202201252 voltage and current. [1] Due to this fascinating characteristic, memristor has been explored for various applications, such as signal processing, high-resolution imaging, physical neural networks, neuromorphic computing, and in-memory computing. [2][3][4][5][6][7][8][9][10] Owing to the low energy consumption, [11][12][13] memristive devices have the potential as a replacement for the existing complementary metal-oxide semiconductor-based logic computing systems. [14] Since the first introduction of the memristor in 2008, [15,16] many memristors have been experimentally fabricated. Most of these memristors are based on transition-metal oxides. [17] In such devices, the switching mechanism is due to the formation of a conduction channel within the insulating oxide through the redistribution of intrinsic vacancies or the formation of conducting filaments. However, the switching behavior of such memristors is challenging to control, and as a result, they often exhibit high cycle-to-cycle variations. Recently, 2D transition-metal dichalcogenides (TMDCs) have emerged as a promising class of functional materials to fabricate memristors. [8,[18][19][20][21][22][23] Resistive switching behavior has been observed in several metal-TMDC-metal lateral structures, such as Au-MoS 2 -Au and Ti-ReS 2 -Ti. Such memristors generally exhibit a lower switching voltage and gate-tunable switching behavior, making them promising candidates for building nextgeneration energy-efficient, high-density electronic systems.
Although many metal-TMDC-metal-based memristors have been demonstrated, reported switching characteristics are often quite various. [8,[20][21][22][24][25][26][27][28] In the following, we first examine the switching behaviors of these fabricated memristors and classify them. We then analyze the underlying switching mechanisms and the conditions leading to the emergence of switching mechanisms. Finally, we provide guidelines for experiments and suggest the design principles for realizing the different types of memristors.

Four Types of Memristors
The switching behavior of a memristor is characterized by the current-voltage (I-V) curve when the device is swept by voltage in a switching cycle consisting of four stages. In Stage S1 (Supporting Information), a forward voltage bias is applied from 0 to a maximum voltage. In For Schottky barrier-modulated memristors based on 2D semiconductors, it has, to date, not been possible to achieve control over defect type and concentration as the measured switching characteristics vary considerably even under similar fabrication conditions. In this work, four distinct types of memristors are identified based on the combination of low and high resistance sequences, as well as volatile and nonvolatile characteristics. All these four types of memristors were previously observed experimentally by different research labs. It is found that the specific behavior of each memristor type can be explained by the Schottky barrier height modulation and current rectification arising from the concerted effects of the concentration, charge polarity and mobility of defects. The conditions required to realize the four types of 2D semiconductor-based memristors are analyzed and design guidelines for fabricating each of these four types of memristors are provided.

Introduction
Memristor, which is characterized by the dynamic relationship between current and voltage, is the fourth fundamental circuit element. [1] This two-terminal circuit element can change its electric resistance according to the history of applied www.advelectronicmat.de Stage S2 (Supporting Information), the forward voltage bias is decreased from the maximum voltage back to 0. In stage S3 (Supporting Information), a reversed voltage is applied from 0 to the minimum voltage. In stage S4 (Supporting Information), the reserved voltage is decreased from the minimum voltage back to 0. By going through these four stages, in principle, the device can show four different types of I-V characteristics. For Type 1, the device switches from high resistance states (HRS) in S1 to low resistance states (LRS) in S2 and then from HRS in S3 to LRS in S4. That is, Type 1 follows the sequence of HRS in S1 → LRS in S2 → LRS in S3 → HRS in S4 during the voltage sweep. For Type 2, the device follows the sequence of LRS in S1→ HRS in S2 → HRS in S3 → LRS in S4. For type 3, it follows the sequence of HRS in S1→ LRS in S2 → HRS in S3 → LRS in S4. Last, for Type 4, it follows the sequence of LRS in S1 → HRS in S2 → LRS in S3 → HRS in S4. These four types of switching behaviors are summarized in Table 1, and their representative I-V curves are shown in Figure 1a. Type 1 and Type 2 devices are called nonvolatile devices, while type 3 and 4 devices are called volatile devices.
We found that all four types of memristors were observed experimentally in metal-TMDC-metal-based structures by different labs. For example, Li et al. realized a Type 3 memristor in a Ti-ReS 2 -Ti structure, [20] and Li et al. observed Type 2 and Type 4 memristors in an Au/Ti-MoS 2 -Ti/Au structure. [21] The references are given in the last column of Table 1.
It is noted that the defect type and their concentration cannot be controlled during the memristor fabrication; thus, the defects may cause different memory-switching behaviors, leading to the four different types of switching characteristics. Consequently, the questions are: What is the underlying reason for the four different types of switching behavior? What are the controlling factors determining the type of memristors? What are the design principles required to realize these types of memristors? The answers to these questions are of great importance for designing specific types of memristors with desired properties. To answer these questions, we first analyzed the underlying physical mechanisms involved in memory switching, and then we formulated a theoretical model to explain the switching behaviors. Next, we performed the simulations to identify the parameter regimes and the conditions required to realize each type of memristor. Finally, we proposed the design principles for realizing a specific type of memristor.  www.advelectronicmat.de

Model Classification
A typical metal-TMDC-metal structure is shown in Figure 1b, where the TMDC connects with two electrodes that act as the electron source and drain. Schottky barriers are formed at the metal-TMDC and TMDC-metal contacts. It is well known that various defects, such as vacancies (e.g., S vacancy in MoS 2 ) and dislocations, can be formed in the TMDC at the contacts. These defects can migrate under an applied electric field, which changes the defect distributions; therefore, the Schottky barrier height (SBH), giving rise to the memristive behavior. Hence, the switching mechanism is based on two conditions: (1) The flow of electric current causes the migration of defects and thus changes the defect concentration in the contact regions in the TMDC. (2) The change in defect concentration affects the SBH of the contacts and thus changes the contact resistance. [29] It is well known that a defect has different effective charge polarities. For example, in a traditional metal oxides-based memristor, oxygen vacancies have been identified to be positively charged, and their migration under an electric field causes its memristive behavior. [15] In Schottky-barrier-based memristors, the sulfur vacancies in MoS 2 are positively charged. [21] However, the sulfur vacancies in ReS 2 are negatively charged. [20] On the other hand, the correlation between the defect concentration and SBH can also be positive or negative. For example, a negative correlation due to the image-lowering effect has been proposed to describe the Au-MoS 2 contacts with sulfur vacancies. [22] On the contrary, a positive correlation has been reported in the Ti-ReS 2 [20] and Ti-MoS 2 interface. [21] This is because an increase in sulfur vacancies can alleviate the fermi-level pinning and hence reduce the SBH. Besides these experimental studies, first-principles calculations also reveal that the sulfur vacancies in MoS 2 will increase the SBH when it is contacted with Mg, Al, and In; but decrease when contacted with Cu, Ag, Pd, [30] Co, and Ni. [31] In summary, there are two outcomes: (1) A defect can migrate either in the same or in the opposite direction of the electric current depending on its polarity, and (2) The SBH can be increased or decreased by an increase in the defect concentration, denoted by φ B ↑ and φ B ↓, respectively. With these outcomes, one can identify the four different scenarios for the switching behavior in memristors. We note that if the defects migrate in the same direction as the electric current, and if an increase in defect concentration raises the SBH, this switching behavior would be similar to that of a device in which its defects migrate in the opposite direction of the electric current and an increase in defect concentration decreases the SBH. Therefore, the four scenarios can be divided into two categories, as shown in Table 2. It is expected that the switching behaviors of memristors in the same category are similar, while those in different categories are different.

Contact Resistance
In a metal-TMDC-metal structure, the total electric resistance consists of three parts: two contact resistances and the bulk resistance of the functional material (TMDC), denoted as R 1 (metal-TMDC interface), R 2 (TMDC-metal interface) and R 3 (TMDC bulk), respectively. The total bias voltage V is given by and V 3 are the voltages across the metal-TMDC interface, TMDC-metal interface and TMDC bulk, respectively.
The I-V relation of a Schottky diode at the metal-TMDC interface can be described by the thermionic emission model, where the current flowing from the metal to the semiconductor is given by [32] exp 1 exp where I 0 is the saturation current, φ B denotes the SBH, and V t = ηk B T/e, η is the ideality factor, e is the electron charge, and k B is the Boltzmann constant. Throughout this work, we use k B T = 0.025 eV as the memristor device is assumed to work at room temperature. For the TMDC-metal contact, the I-V relation is obtained by reversing the sign of both V and I, given by [22] exp 1exp where φ B2 is the Schottky barrier at the functional materialdrain interface. For the bulk functional material, we assume that it has a constant resistance R. Then we have, It follows immediately from the above equations that if V ≪ V t , the rectification effect of the Schottky diode is not apparent. In this case, the interface resistances at the metal-TMDC and TMDC-metal contacts are equally important. However, when V ≫ V t , the current under a forward bias increases exponentially with increasing voltage, while the reverse current saturates. Therefore, the bottleneck for the electric current is at the TMDC-metal contact. As a result, for the forward voltage bias, the resistance at the TMDC-metal contact dominates in the total resistance. Similarly, at the reverse voltage bias, the bottleneck is at the metal-TMDC contact. The resistance at the metal-TMDC contact dominates in the total resistance.
Using the equations (1-3), we can obtain the I-V relation as  Equation (4) describes the I-V characteristics, assuming that the Schottky barriers on both sides are known. This is the main equation used in the following numerical simulation.

Defects Migration
To model the switching behavior of a memristor, one needs to know how the defects in the TMDC layer migrate with the electric current. Initially, the defects are distributed across in the TMDC layer in both the contact regions and the central regions. Assume the defect concentrations at the two contact regions are ρ 1 and ρ 2 , respectively. When a scanning voltage is applied, the defects may migrate from the contact region to the central region, depending on the defect charge polarity and the electric field direction. Hence, the defect concentrations at the contract regions will change. Here, we assume that the change in the defect concentration is governed by a nonlinear drift model [33] : where max ρ ρ ρ = ∈(0,1) 1 is the normalized defect concentration in the left metal-TMDC region. It is noted that the window function has been introduced before [34,35] to ensure that ρ 1 remains between 0 and 1. The parameter E is the proportional constant, defined as the change in defects concentration at the contact region driven by one Coulomb of conducting electrons. Hence, it is related to the defect mobility, electron mobility, and the total number of electrons in the contact region. Given the mobility of defects µ D , the current of defects, J, under the electric field E′ can be written as J = µ D n a ρE′S, where S is the cross-section area, n a is the total number of atoms per unit volume. The current of defects is related to the change in the defect concentration according to ρ ∂ ∂ = t J Vn a . Similarly, the electric current carried by electrons can be written as I = eµ e n e E′S, where µ e is the electron mobility and n e is the carrier (electron) concentration. From the above-mentioned three relations, the proportional constant E can be written as where N e = Vn e is the total number of conducting electrons in the contact region within the contact volume V. It is evident that E is proportional to the ratio of defect to electron mobility. In a typical experiment, [20,23] the length and width of devices are in the micrometre scale while the thickness is in the nanometre scale. Therefore, the total number of conducting electrons of TMDC can be roughly estimated as 10 9 . On the other hand, the ratio of defect mobility [36] and electron mobility [37] can vary from 10 -1 to 10 -6 , depending on the type of materials, as well as the type of defects. As a result, the value of E is normally in the range of 10 4 to 10 9 C -1 , where E = 10 4 C −1 corresponds to a small mobility ratio (≈10 -6 ) while E = 10 9 C −1 corresponds to a large mobility ratio (≈10 -1 ). It is noted that E is positive when the defects migrate in the same direction as the electric current and negative when the defects migrate in the opposite direction. The change of ρ 2 (defects density in the right TMDC-metal region) is governed by a similar equation, except that the sign of E is the opposite.

Schottky Barrier Height Modulation
Next, we discuss the dependence of the SBH on defect concentration. For the cases where the SBH increases with defect concentration, we take the data from first-principles calculations at the Au/MoS 2 heterojunction with and without S vacancies [38] since Au-MoS 2 -Au-based memristors have been fabricated and studied. In the Au-MoS 2 -Au memristors, the SBH varies with the defect concentration ρ. For the first case, where the SBH increases with the increase in the defect concentration, we found that the pristine Au-MoS 2 contact has an SBH of 0.57 eV, and the SBH increases to 0.67 eV when the S vacancy concentration increases to 5.6%. In the present studies, we use linear interpolation for the SBH as a function of vacancy concentration φ B = 0.57 eV + ρ × 1.8 eV, with a maximum concentration of ρ max = 18%. For the case where the SBH decreases with the defect concentration, we use a similar range of SBH values. Using linear interpolation, we found φ B = 0.82 eV − ρ × 1.4 eV.

Results and Discussion
We can obtain the I-V characteristics for the metal-TMDCmetal memristor at different parameters using the model. The results are shown in Figure 2 for the maximum sweep voltage V = 0.1V t , V = V t and V = 10V t , respectively. To exhibit the memristive behavior, the sweep voltage has to match the value of E (mobility of the defects). For a device with high defect mobility, a small voltage is sufficient to drive the defect migration. However, if the applied voltage is too large, in that case, the defects can be driven to migrate away from the TMDC-metal contact region and thus the number of defects in the TMDC layer at the contact is significantly reduced, which results in a non-memristive behavior. On the other hand, if the defect mobility is low, one can apply a large sweep voltage. A small sweep voltage may not be sufficient to cause the defect migration, resulting in a non-memristive behavior. For the devices of Category 1, for which the SBH increases with an increase in defect concentration and the defects migrate in the same direction as the current, the types of memristors are shown in Figure 2a-c against the initial values of ρ 1 and ρ 2 . In the case of a small sweep voltage where V = 0.1V t , which corresponds to a device with highly mobile defects (large E), we found that the device is categorized as a Type 2 (as long as ρ 1 is sufficiently small). For a small sweep voltage, the SBHs at both the metal-TMDC and TMDC-metal contacts predominantly contribute to the total resistance. As a result, the LRS or HRS is determined by the contact with the highest SBH value. If ρ 1 < ρ 2 , then B B φ φ < 1 2 , and the resistance at the TMDC-metal www.advelectronicmat.de contact dominates. When a forward bias is applied to further decrease ρ 1 and increase ρ 2 , B φ 2 as well as the contact resistance increases, causing the switching from LRS to HRS. Once a reverse bias is applied, these effects reverse so that ρ 1 increases while ρ 2 decreases, resulting in the switching from HRS to LRS. This Type 2 behavior maintains as long as B φ 2 predominates in the total resistance during the entire S1 stage.
On the contrary, if ρ 1 is sufficiently large so that even though B φ 1 decreases in S1 stage, B φ 1 is still larger than B φ 2 (up to the maximum sweep voltage). If this happens, B φ 1 continues to dominate in S2 stage. As a result, the total resistance decreases. Therefore, it exhibits Type 1 behavior as seen in the red region of Figure 2a.
The white zone in Figure 2a indicates that the defect concentration is too small to modulate the SBH, thus the on/off ratio is small and the memristive behavior is not apparent. In the pink zone, Type 4 behavior is observed, which is caused by the rectification effect of the Schottky contact. Even though the rectification is small, due to the low defect concentration in this region, its effect is comparable to that of resistance difference caused by the variation in the SBH. This mechanism is similar to that in Figure 2c, which will be explained below.
When a sweep voltage is much larger than V t , the rectification effect becomes significant. This corresponds to a device with a low defect mobility. For such a device, the electric current is stronger from the metal to TMDC than from the TMDC to metal. For a forward bias, the TDMC-metal contact predominates the metal-TDMC contact resistance, while the metal-TDMC contact predominates for a reverse bias. In this case, Type 4 switching behavior is observed as shown in Figure 2c. For a forward bias, an increase of ρ 2 raises the SBH at the dominant TMDC-metal contact, resulting in a switching from LRS to HRS. A reverse bias increases ρ 1 , which in turn raises the SBH at the dominant metal-TMDC contacts, leading to switching from LRS to HRS.
In summary, whether the device is nonvolatile or volatile depends on the significance of the rectification effect of the Schottky diode. If the rectification effect is insignificant, then the resistances at both the left and right contacts are predominant, so that the total resistance will not depend on the direction of applied bias. In other words, an LRS will remain as an LRS even if the direction of the applied scanning voltage is changed, resulting in a nonvolatile device. If the rectification effect is significant, then the dominant resistance will depend on the direction of the applied voltage. The dominant resistance is at the right contact for forward bias and at the left contact for reversed bias. That means that the dominant resistance alternatively changes when the direction of the applied voltage changes. In other words, an LRS (at right contact) in the forward bias will change to an HRS (at left contact) in the reversed bias, resulting in a volatile device.
At the intermediate sweep voltage, as shown in Figure 2b, three distinct types of switching behaviors can be observed, which are caused by the competition between the SBH modulation and current rectification. We cannot find Type 3 behavior in Category 1 devices. Type 3 memristor, on The white region indicates non-memristive behavior as the on/off ratio is small. The value of proportional constant E is 1 × 10 8 C -1 for (a), 1 × 10 7 C -1 for (b), and 1 × 10 6 C -1 for (c), 1 × 10 7 C -1 for (d), 1 × 10 6 C -1 for (e), and 1 × 10 4 C -1 for (f). We use I 0 = 1 × 10 9 A and k B T = 0.025 eV for all the plots.

www.advelectronicmat.de
the other hand, appears in Category 2 devices, as shown in Figure 2d-f.
For Category 2 devices (in this case, the SBH decreases with increasing defect concentration, and the defects migrate in the same direction as the electric current), the result for the small sweep voltage (V = 0.1V t ) is similar to that of Category 1 devices. In this case, ρ 2 must be sufficiently small to obtain Type 1 switching behavior. Otherwise, Type 2 switching behavior is observed. Type 3 switching behavior is observed only when the sweep voltage is large enough (see Figure 2f. For a forward bias, ρ 2 increases, and hence, the SBH decreases at the TMDC-metal contact, switching from HRS to LRS. For a reverse sweep voltage, ρ 1 increases, and thus, the SBH is reduced at the metal-TMDC contact. Again, the device switches from HRS to LRS, resulting in Type 3 behavior.
Our analysis shows that the competitions of various mechanisms under several external factors lead to different switching behaviors. The factors that govern the switching behaviors are presented in Table 3, which provides simple guidelines for identifying a particular type of memristor.
To verify our analysis of the switching mechanisms, we performed a case study for each type of memristor by examining the I-V characteristics, SBH and interface resistance (see Figure 3). The parametric values for each type of devices are given in Figure 2. For Type 1, we found that the crossover of B φ 1 and B φ 2 does not occur throughout the S1 stage. Therefore, the minimum resistive state is at the S2 stage, resulting in the Type 1 device. Figure 3f confirms that the dominant resistance is determined by the metal-TMDC contact with a higher SBH value, indicating that the switching can be obtained by modulating the SBH contacts. In contrast, for the Type 2 device, the crossover happens during the S1 stage. These results confirm that the contact with the higher SBH predominates the total resistance for a small sweep voltage regime. Thus, if the crossover of the SBH happens at S1  The red, green, blue and purple colors indicate S1, S2, S3, and S4, respectively. The parameter regime (ρ 1 and ρ 2 ) of each type is labelled in Figure 2.
www.advelectronicmat.de stage, it determines the Type 2 device (otherwise, the Type 1 device). The Type 3 and Type 4 behaviors occur at the high bias regime. As can be seen in Figure 3k,l, the R 2 always predominates in the forward sweep while the R 1 always predominates in the reverse sweep. Therefore, only the B φ 2 affects the I-V characteristics in the forward sweep, while only the B φ 1 is responsible for the switching mechanism in the reverse sweep. Due to this unique behavior, Type 3 behavior can only be realized in Category 2 devices, and Type 4 behavior can only be realized in Category 1 devices.
To further verify our model, we collected measured data from experiments and classified them into the four types of switching behavior, as shown in Figure 4. Panels (a) and (b) show measured data from the same device. Interestingly, this device shows nonvolatile behavior under a relatively smaller sweep voltage (25 V) but volatile behavior under a larger sweep voltage (50 V), [21] which is consistent with the prediction of our model.
Nonvolatile devices can be further classified into Type 1 and Type 2 devices. According to our model, this classification depends on the initial condition of the defect distribution. Interestingly, both Type 1 and Type 2 devices are reported in the literature even with the same functional and electrode materials. [8,27] This observation supports our idea that a device being of Type 1 or Type 2 is not material-specific but depends on the defect distribution at the initial state before the measurement.
Volatile devices can also be further classified into Type 3 and Type 4. According to our model, such classification depends solely on the catalogue of the devices. A device of Catalogue 1 only presents Type 4 behavior, while a device of Catalogue 2 only presents Type 3 behavior. Panels (e) and (f) show the I-V characteristics of Catalogue 2 devices that present Type 3 behavior, which supports our model. Interestingly, devices in panel (e) and (f) form Catalogue 2 devices in different ways. The device in panel (e) has a negative defect polarity and a positive correlation between defect concentration and the Schottky barrier. [20] However, the device in panel (f) has a positive defect polarity and positive SBH correlation. [22] On the other hand, Panel (g) shows a Type 4 behavior from Catalogue 1 devices, [39] which is consistent with our model. Our model also predicts that devices with negative defect polarity and negative SBH correlation also exhibit a Type 4 behavior, though we are not able to find such experiments in the literature.  [21] Copyright 2018, American Chemical Society. (c) Reproduced with permission. [8] Copyright 2019, WILEY-VCH. (d) Reproduced with permission. [27] Copyright 2019, American Chemical Society. (e) Reproduced with permission. [20] Copyright 2021, Springer Nature. (f) Reproduced with permission. [39] Copyright 2019, American Chemical Society. www.advelectronicmat.de

Conclusion
We identified four types of memristive behaviors in the metal-TMDC-metal two-terminal memristors. All four types of devices have been reported separately by different research labs. By developing a theoretical model, we demonstrated that the different memristive behaviors are the results of competition between the various mechanisms under several internal and external factors. Specifically, we showed that the defect concentration, along with the effective charge polarity of defects and defect mobility plays an essential role. The relation between the SBH and defect concentration, as well as sweep voltage amplitude, are all crucial contributing factors. Through simulations, we mapped out the parameter regimes for each type of memristors and explored the underlying mechanisms leading to the different switching behaviors. The nonvolatile behavior is observed when the modulation of SBH is greater than the rectification effect in the contact resistance. This is typical for a device with high defect mobility, where the required sweep voltage is small. In contrast, volatile behavior is observed when there is a significant rectification effect at a larger sweep voltage, which is typical in a device with low defect mobility. We further show that our predictions are consistent with the measured data from actual devices in the literature. We then proposed the guidelines to design a specific type of memristor with particular characteristics.

Experimental Section
The results of this work were obtained by solving Equations (4-7) numerically. The differential equation (Equation (5)) was numerically solved by using The Runge-Kutta method with a time step of 10 -5 s so that convergence was reached. The electronic current, which was a root of Equation (4), was found numerically by using the Newton-Raphson method at each iteration step. All the parameters used in the simulation are discussed in the Results and Discussion section. The details can be found in Supporting Information.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.